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PDF PTN3311D Data sheet ( Hoja de datos )
| Número de pieza | PTN3311D | |
| Descripción | High-speed serial logic translators | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
PTN3310/PTN3311
High-speed serial logic translators
Product data
2001 Jun 19
Philips
Semiconductors
1 page  
Philips Semiconductors
High-speed serial logic translators
Product data
PTN3310/PTN3311
AC ELECTRICAL CHARACTERISTICS
Symbol Parameter
Conditions
Min Typ Max Unit
General
fMAX
tSKEW
Maximum throughput data rate
Clock output skew, part-to-part
Clock output pulse skew
655 800 –
– 100 –
– 50 –
Mbps
ps
ps
Propagation delay input (differential) to output
tPLH/tPHL Propagation delay input (single-ended) to output
– 1 3 ns
– 1 3 ns
PECL outputs (PTN3310)
tr/tf
Output rise and fall times at 20% and 80%
intersects
– 200 300 ps
LVDS outputs (PTN3311); RL = 100 Ω; CL = 5 pF
tTLH Transition time LOW to HIGH
tTHL Transition time HIGH to LOW
VOSS
Peak-to-peak switching offset voltage
RL = 100 Ω; CL = 5 pF
RL = 100 Ω; CL = 5 pF
Measured between two
matched 49.9 Ω load resistors;
5 pF load capacitance
–
–
–
500 650 ps
500 650 ps
– 150 mV
LVDS REFERENCE MEASUREMENT CONFIGURATION
PTN331x
15
26
37
48
Vod = Voutp – Voutn
CLVDS
Voutp
Rload
Vos
Rload
Voutn
Cprobe
Cprobe
Rload = 50 Ohms
CLVDS = 5 pF
ST00041
The above diagram shows the test set-up used when evaluating
LVDS outputs. According to the TIA-EIA-644 Standard, the
maximum lumped capacitance test load should be 5 pF. However,
by using probes or cables to observe the signal, additional
capacitance is added, which has an effect on the rise and fall times.
Cprobe represents any capacitance caused by the use of probes or
cables. Assuming balanced loading and balanced output drivers, the
total effective capacitance seen by the part is:
CEff = CLVDS + 1/2 Cprobe
To correctly account for the effects of Cprobe, the following formula
should be used:
5 pF
Dt + CEff Dt measured,
Where ∆t is the 20%–80% rise/fall time.
To avoid the use of additional calculation of the measured results, a
different approach could be taken; however, the value of Cprobe has
to be known in advance. In that case, the value of CLVDS can be
chosen such that the sum of the capacitances equals 5 pF, i.e.:
CLVDS + 1/2 Cprobe = 5 pF
2001 Jun 19
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet PTN3311D.PDF ] | |
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