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PDF TM-1000 Data sheet ( Hoja de datos )
| Número de pieza | TM-1000 | |
| Descripción | Programmable Media Processor | |
| Fabricantes | NXP Semiconductors | |
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Programmable Media Processor
FEATURES
+ Processes audio, video, graphics, and communications
datastreams on a single chip
+ Powerful, fine-grain parallel, 100 MHz VLIW CPU with
separate instruction and data caches
+ Independent, DMA-driven multimedia I/O units to
format data and multimedia coprocessors to offload
the TriMedia CPU of specific multimedia algorithms
+ High-performance bus and memory system to manage
communication between TriMedia processing units
+ Instruction set includes RISC, multimedia, SIMD-type
DSP, and IEEE-compliant floating point operations
+ Robust software development tools and libraries that
enable multimedia application development entirely in
C/C++ programming languages
+ Configurable for standalone and plug-in card applica-
tions in consumer electronics and PC products
TriMedia TM-1000
The TriMedia™ TM-1000 is a general-purpose microprocessor for
real-time processing of audio, video, graphics, and communications
datastreams. In a single chip, TM-1000 combines an ultra-high
performance, low cost CPU with a full complement of I/O and
coprocessing peripheral units.
In consumer electronics appliances and personal computing prod-
ucts, the TM-1000 media processor performs multimedia functions
with the advantages of special-purpose, embedded DSP solutions —
low cost and single-chip packaging — and the programmability of
general-purpose CPUs. It improves time-to-market through high-
level C/C++ language programmability and delivers throughput of
up to four billion operations per second.
MULTIMEDIA APPLICATIONS
TM-1000 is an ideal building block for any multimedia application
that requires processing of video, audio, graphics, and communica-
tions datastreams. It is well suited for applications ranging from
single-purpose systems such as videophones, to reprogrammable,
multipurpose devices such as set-top boxes or web browsers.
TM-1000 easily implements popular multimedia standards such as
MPEG-1 and MPEG-2, but its orientation around a powerful, pro-
grammable general-purpose CPU makes it capable of a variety of
multimedia algorithms, whether open or proprietary.
HARNESSING THE POWER OF VLIW
TM-1000 delivers top performance through its elegant implementa-
tion of a fine-grain parallel architecture known as very-long instruc-
tion word, or VLIW. Unique to the TriMedia processor’s VLIW
implementation, parallelism is optimized at compile time by the
TriMedia compilation system. No specialized scheduling hardware is
required to parallelize code during execution. Hardware saved by
eliminating complex scheduling logic reduces cost and allows the
integration of multimedia-specific features.
With the capacity to pack multiple operations into one VLIW
instruction and 27 functional units in which to process them,
TM-1000 can execute up to five operations in parallel with each
clock cycle. Such parallel processing is an ideal complement to the
inherently parallel nature of multimedia applications.
Another key contributor to TM-1000’s top performance is its use of
conditional execution. During program creation, an instruction
scheduler adds conditional code to each operation to enable guarded
execution — a technique that increases fine-grain parallelism and
significantly decreases code branching and execution time.
1 page  
AUDIO INPUT AND AUDIO OUTPUT
The TM-1000 incorporates audio input (AI) and audio output (AO)
units which use autonomous DMA to service datastreams required by
common serial audio DAC and ADC chips. Both units support glue-
less I/O of stereo 16-bit audio data at sample rates up to 100 kHz.
A small amount of glue logic enables output of up to eight channels.
The audio interfaces are highly programmable, providing adaptability
to custom protocols and future standards.
TM-1000’s audio interfaces can be programmed to provide the master
clock to over-sampled ADCs and DACs. The clock generated on chip
can be controlled with a resolution of .0006 ppm. This high resolution
gives programmers subtle control over sampling frequency allowing
them to simplify the synchronization algorithms required in complex
multimedia systems.
IMAGE COPROCESSOR
The image coprocessor (ICP) offloads the TriMedia CPU of image
processing and manipulation tasks such as copying an image from
SDRAM to a host’s video frame buffer. It can operate as either a mem-
ory-to-memory or a memory-to-PCI coprocessor device. In memory-
to-memory mode, the ICP can perform horizontal or vertical image
filtering and scaling. In memory-to-memory and memory-to-PCI
modes, it can perform horizontal scaling and filtering followed by
YUV to RGB color-space conversion for screen display.
HOST-ASSISTED COPROCESSOR
SDRAM
CAMERA
AUDIO
PCI BUS
VCR
TV MONITOR
AUDIO
GRAPHIC
CARD
RGB IMAGE SEQUENCES
HOST CPU
MEMORY
STANDALONE
SDRAM
The ICP also provides display support for live video in overlapping
windows, the number and sizes of which are limited only by band-
width. The final resampled and converted image pixels are transmitted
over the PCI bus to an optional off-chip graphics card/frame buffer.
VARIABLE LENGTH DECODER
TM-1000’s variable length decoder (VLD) offloads the processing-
intensive task of decoding Huffman-encoded video datastreams such
as MPEG-1 and MPEG-2. The lower bit rate required by videoconfer-
encing applications can be adequately handled by the TriMedia CPU
without the coprocessor.
I2C INTERFACE
TM-1000’s I2C interface enables inter-chip connection to and control
of other I2C devices. This allows TM-1000 to configure and inspect
status of peripheral video devices such as video decoders and encoders
and some camera types. It is also used at boot time to read the boot
program from the EPROM.
SYNCHRONOUS SERIAL INTERFACE
TM-1000’s synchronous serial interface (SSI) provides serial access for
a variety of multimedia applications, such as video phones or video-
conferencing, and for general data communications in PC systems.
The SSI contains all the buffers and logic necessary to interface with
simple analog modem front ends. When combined with the TriMedia
V.34 software library, the SSI provides fully V.34-compliant modem
capability. The TriMedia CPU performs the data pump, fax protocols,
AT command handling, and error correction/detection. Alternatively,
the TM-1000 SSI can connect to an ISDN interface chip to provide
advanced digital modem capabilities.
TIMERS
The TM-1000 contains four timers: three are available to program-
mers, the fourth is reserved for the system.
HIGH-SPEED PCI BUS INTERFACE
TM-1000’s PCI interface connects the VLIW CPU and on-chip I/O
and coprocessing units to a PCI bus. In PC-based applications,
TM-1000 can gluelessly interface to the standard PCI bus, allowing it
to be placed directly on the PC mainboard or on a plug-in card. In
embedded applications where TM-1000 is the main processor, the
PCI bus can be used to interface to peripheral devices that implement
functions not provided by on-chip peripherals.
CAMERA
AUDIO
VCR
TV MONITOR
AUDIO
PERIPHERAL
PERIPHERAL
PCI BUS
ROM/FLASH
The first member of the TriMedia family, the TM-1000 is designed for
use both as a coprocessor in a PC-hosted environment and the sole
CPU in standalone systems.
5 Page | ||
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| PDF Descargar | [ Datasheet TM-1000.PDF ] | |
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