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Teilenummer | TZA3019AHT |
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Beschreibung | 2.5 Gbits/s dual postamplifier with level detectors and 2 x 2 switch | |
Hersteller | NXP Semiconductors | |
Logo | ||
Gesamt 32 Seiten INTEGRATED CIRCUITS
DATA SHEET
TZA3019
2.5 Gbits/s dual
postamplifier with level
detectors and 2 × 2 switch
Preliminary specification
File under Integrated Circuits, IC19
2000 Apr 10
Philips Semiconductors
2.5 Gbits/s dual postamplifier with level
detectors and 2 × 2 switch
Preliminary specification
TZA3019
PINNING
PIN
SYMBOL TZA3019xHT/xV(1) PAD TYPE(2)
DESCRIPTION
ABC
GND1A 1 1 1 1
IN1 2 2 2 2
IN1Q
3333
GND1A 4 4 4 4
n.c − − − 5
n.c − − − 6
GND2A 5 5 5 7
IN2 6 6 6 8
IN2Q
7779
GND2A 8 8 8 10
VEE2A
9 9 9 11
LOSTH1 10 10 10 12
LOSTH2 11 11 11 13
n.c − − − 14
LEVEL1 12 12 12 15
LEVEL2 13 13 13 16
Vref
n.c
TEST
VEE2B
GND2B
OUT2Q
14 14 14 17
− − − 18
15 15 15 19
16 16 16 20
17 17 17 21
18 18 18 22
S ground for input 1 and LOS1 circuits
I differential circuit 1 input; complimentary to pin IN1Q; DC bias level
is set internally at approximately −0.33 V
I differential circuit 1 input; complimentary to pin IN1; DC bias level is
set internally at approximately −0.33 V
S ground for input 1 and LOS1 circuits
− not connected
− not connected
S ground for input 2 and LOS2 circuits
I differential circuit 2 input; complimentary to pin IN2Q; DC bias level
is set internally at approximately −0.33 V
I differential circuit 2 input; complimentary to pin IN2; DC bias level is
set internally at approximately −0.33 V
S ground for input 2 and LOS2 circuits
S negative supply voltage for input 2 and LOS2 circuits
I Input for level detector programming of input 1 circuit; threshold
level is set by connecting external resistors between pins
GND1A and Vref. When forced to VEE2A or not connected, the
LOS1 circuit will be switched off.
I Input for level detector programming of input 2 circuit; threshold
level is set by connecting external resistors between pins
GND2A and Vref. When forced to VEE2A or not connected, the
LOS2 circuit will be switched off.
− not connected
I Input for programming output level of output 1 circuit; output level is
set by connecting external resistors between pins GND1A and Vref.
When forced to GND1A or not connected, pins OUT1 and OUT1Q
will be switched off.
I Input for programming output level of output 2 circuit; output level is
set by connecting external resistors between pins GND2A and Vref.
When forced to GND2A or not connected, pins OUT2 and OUT2Q
will be switched off.
O reference voltage for level circuit and LOS threshold programming;
typical value is −1.6 V; no external capacitor allowed
−
I for test purposes only; to be left open-circuit in the application
S negative supply voltage for output 2 circuit
S ground for output 2 circuit
O PECL or CML compatible differential circuit 2 output;
complimentary to pin OUT2
2000 Apr 10
6
6 Page Philips Semiconductors
2.5 Gbits/s dual postamplifier with level
detectors and 2 × 2 switch
Preliminary specification
TZA3019
handbook, full pagewidth
logic
level
1
2.0 V
(1)
2.0 V
MGS558
handbook, full pagewidth
0.8 V
0
1.4 V
VEE
−4 −3 −2
TTL
0.8 V
GND
1.4 V
−1 0 +1
+2 +3
VI (V)
a. Negative circuit supply voltage VEE and negative logic supply voltage VEE.
logic
level
1
2.0 V
2.0 V
(1)
MGS559
handbook, full pagewidth
0.8 V
0
1.4 V
VEE
−4 −3 −2
TTL
0.8 V
GND
−1 0
1.4 V
+1
VCC
+2 +3
VI (V)
b. Negative circuit supply voltage VEE and positive logic supply voltage VCC.
logic
level
1
2.0 V
(1)
2.0 V
MGS560
0.8 V
0
1.4 V
GND
−1 0 +1
TTL
0.8 V
VCC
1.4 V
+2 +3 +4 +5 +6
VI (V)
c. Positive circuit supply voltage VCC and positive logic supply voltage VCC.
(1) Level not defined.
Fig.9 Logic levels on pins S1, S2, INV1 and INV2 as a function of the input voltages.
2000 Apr 10
12
12 Page | ||
Seiten | Gesamt 32 Seiten | |
PDF Download | [ TZA3019AHT Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
TZA3019AHT | 2.5 Gbits/s dual postamplifier with level detectors and 2 x 2 switch | NXP Semiconductors |
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