VP216 Datasheet PDF - Mitel Networks Corporation
| Part Number | VP216 | |
| Description | Dual 90MHz 6-Bit Analog to Digital Converter with VCO | |
| Manufacturers | Mitel Networks Corporation | |
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VP216
Dual 90MHz 6-Bit Analog to Digital Converter with VCO
Preliminary Information
DS4070 - 1.6 May 1996
The VP216 is a dual 90MHz 6-bit Analog to Digital
Converter designed for use in consumer satellite receivers
and decoders, video systems, multimedia and
communications applications.
Operating from a single +5V supply, the VP216 includes
an on-chip high bandwidth ADC driver amplifier, a 6-bit ADC,
VCO or Ext. clock interface. The VP216 also has the
necessary bias voltages for the reference resistor chain in
the 'flash' architecture of the ADC.
FEATURES
s 90MHz Conversion Rate
s VCO or Ext. Clock Interface
s High Bandwidth ADC Driver Amplifier
s Internal ADC Reference
s TTL Data Outputs
s Single 5 Volt Supply
s Dual ADC System for good channel matching
APPLICATIONS
s Satellite Decoders
s Multimedia
s Communications
www.DataSheet4U.com
ORDERING INFORMATION
VP216A CG HP1S (Commercial - 44 pin PLCC)
VRM 7
VRB 8
AVCC2 9
AGND2 10
COMP_I 11
AIN_I 12
AGND3 13
AVCC3 14
COMP_Q 15
AIN_Q 16
AGND4 17
Fig.1 Pin connections - top view
39 DI2
38 DI1
37 DI0
36 DVCC
35 DGND
34 DQ5
33 DQ4
32 DQ3
31 DQ2
30 DQ1
29 DQ0
HP44
--------A-VC-C-9,1-4-,18-,2-3--------A-V-CC-1-,2------------D-V-CC-36-------
11
COMP_I
12
AIN_I
7
VRM
ADC
DRIVER
+
6-BIT
ADC
VRB VRM VRT
6 LATCHES
DATA
OUTPUTS
VRB 8
VREF
OP AMPS
VRT 6
AIN_Q
16
COMP_Q
15
+
ADC
DRIVER
VRB VRM VRT
6-BIT
ADC
CLOCK
DRIVER
CLK
SEL
LATCHES
6
DATA
OUTPUTS
CLOCK
BUFFER
VCO
&
XTAL
OSC.
37 DI0
38 DI1
39 DI2
40 DI3
41 DI4
42 DI5
27 CLKOUT
25 CLKIN
21 TANK
20 BIAS
19 AGC
22 CLKSEL
29 DQ0
30 DQ1
31 DQ2
32 DQ3
33 DQ4
34 DQ5
----------1-0,-13-,1-7,2-4-----------3,-4 --------------3-5-------
AGND
AGND
DGND
Fig.2 System block diagram
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Device Description
The VP216 is a dual 90MHz 6-bit ADC system, (see
Fig.2). Included on chip is a high bandwidth ADC driver
amplifier, a 6-bit analog to digital converter, latches and TTL
data outputs. The VP216 also has the necessary bias
voltages for the reference resistor chain in the ‘flash’
architecture of the ADC and has an optional VCO or external
oscillator interface.
Analog Input
The analog inputs, (AIN_I,Q) are A.C. coupled into the
non-inverting ADC driver amplifiers, which provide the
necessary bandwidth, gain, offset and low impedance
required to drive the ADC. The amplifier has been designed
so that an input of 0 volts will produce an output level equal
to the voltage present at the middle of the ADC resistor
chain, (VRM = 3V typ.). This is achieved by an internal
feedback loop within each amplifier which compares the
amplifier output with VRM, (see Fig.3). This voltage will
produce a transition binary code of 011111 to 100000 at the
output of the ADC.
VRM
VP216
Clock Interface
The VP216 clock interface allows the ADC to be clocked
in a number of ways. With the CLKSEL pin tied low the on
chip VCO is selected. With the CLKSEL pin tied high the
external TTL clock input is selected.
CLKSEL
Clock Source
1 External Clock
0 VCO
Table 2
The clock signal to the ADC synchronizes the sampling,
conversion and output stages of the device as shown in the
timing diagram (see Fig.4). The output of the ADC driver amp
is sampled when the comparator array is latched after a
rising edge of the input clock. Latched data is then presented
to the TTL data outputs and latched on the falling edge of the
input clock. The clock interface also provides a TTL clock
output on pin 27. This output is limited to driving capacitive
loads of 10pF. Output buffers are recommended for loads in
excess of 10pF.
INPUT
SIGNAL
CCEXT.
ADC DRIVER
AMP
DC SHIFT
TO ADC
COMP_(Q,I)
CCOMP EXT.
Fig.3 DC offset internal feedback loop.
Reference Voltage
An on chip band gap voltage reference circuit combined
with two op-amps provides all the necessary bias voltages
for the ADC reference resistor chain, (VRB), (VRM) and
(VRT). VRB, VRM and VRT have been brought out to pins 8,
7 and 6 respectively and should be decoupled with 100nF
capacitors close to the package pins.
Digital Interface
The TTL data output pins, (DI0-DI5) and (DQ0-DQ5)
have been optimized to interface with devices in close
proximity to the VP216 and are designed to provide
satisfactory logic levels at speeds up to 90MHz into a fanout
of one and a total load capacitance of 10pF. All data outputs
should have approximately equivalent loading to ensure
proper setup and hold timing. For capacitive loads in excess
of 10pF, output buffers are recommended.
Code
00
01
q
31
32
33
q
62
63
Input Voltage
1 Volt Full Scale
16mV = 1LSB
Least +Ve Valid
Input
q
q
q
q
q
q
q
Most +Ve Valid
Input
Table 3: Output coding
Binary
000000
000001
q
011111
100000
100001
q
111110
111111
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for VP216 electronic component. |
| Information | Total 8 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ VP216.PDF Datasheet ] | |
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