Datenblatt-pdf.com


X9110 Schematic ( PDF Datasheet ) - Xicor

Teilenummer X9110
Beschreibung Single Digitally-Controlled (XDCP) Potentiometer
Hersteller Xicor
Logo Xicor Logo 




Gesamt 21 Seiten
X9110 Datasheet, Funktion
APPLICATION NOTES AND DEVELOPMENT SYSTEM
AVAILABLE
AN99 • AN115 • AN124 •AN133 • AN134 • AN135
Dual Supply / Low Power / 1024-tap / SPI bus
Preliminary Information
X9110
Single Digitally-Controlled (XDCP) Potentiometer
FEATURES
• 1024 Resistor Taps – 10-Bit Resolution
• SPI Serial Interface for write, read, and transfer
operations of the potentiometer
• Wiper Resistance, 40Typical @ 5V
• Four Non-Volatile Data Registers
• Non-Volatile Storage of Multiple Wiper Positions
• Power On Recall. Loads Saved Wiper Position on
Power Up.
• Standby Current < 3µA Max
• System VCC: 2.7V to 5.5V Operation
• Analog V+/V-: -5V to +5V
• 100KEnd to End Resistance
• 100 yr. Data Retention
• Endurance: 100, 000 data changes per bit per
register
• 14-Lead TSSOP, xx-Lead XBGA
• Dual Supply Version of the X9111
• Low Power CMOS
DESCRIPTION
The X9110 integrates a single digitally controlled
potentiometer (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 1023 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
SPI bus interface. The potentiometer has associated
with it a volatile Wiper Counter Register (WCR) and
four non-volatile Data Registers that can be directly
written to and read by the user. The contents of the
WCR controls the position of the wiper on the resistor
array though the switches. Powerup recalls the
contents of the default data register (DR0) to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
FUNCTIONAL DIAGRAM
VCC
RH V+
SPI
Bus
Interface
Address
Data
Status
Bus
Interface &
Control
Write
Read
Transfer
Control
Power On Recall
Wiper Counter
Register (WCR)
Data Registers
(DR0-DR3)
Wiper
100K
1024-taps
POT
VSS NC NC
RW RL
V-
REV 1.1.4 11/13/00
www.xicor.com
Characteristics subject to change without notice. 1 of 21






X9110 Datasheet, Funktion
X9110 – Preliminary Information
Table 1. Wiper Control Register, WCR (10-bit), WCR9–WCR0: Used to store the current wiper position (Volatile, V)
WCR9 WCR8 WCR7 WCR6 WCR5 WCR4 WCR3 WCR2 WCR1 WCR0
VVVVVVVVVV
(MSB)
(LSB)
Table 2. Data Register, DR (10-bit), Bit 9–Bit 0: Used to store wiper positions or data (Non-Volatile, NV)
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
NV NV NV NV NV NV NV NV NV NV
MSB
LSB
Table 3. Status Register, SR (1-bit)
WIP
(LSB)
DEVICE INSTRUCTIONS
Identification Byte (ID and A)
The first byte sent to the X9110 from the host, following
a CS going HIGH to LOW, is called the Identification
Byte. The most significant four bits of the slave address
are a device type identifier. The ID[3:0] bits is the
device ID for the X9110; this is fixed as 0101[B] (refer
to Table 4).
The A0 bit in the ID byte is the internal slave address.
The physical device address is defined by the state of
the A0 input pin. The slave address is externally
specified by the user. The X9110 compares the serial
data stream with the address input state; a successful
Table 4. Identification Byte Format
Device Type
Identifier
ID3
0
(MSB)
ID2
1
ID1
0
Table 5. Instruction Byte Format
Instruction
Opcode
ID0
1
compare of the address bit is required for the X9110 to
successfully continue the command sequence. Only
the device whose slave address matches the incoming
device address sent by the master executes the
instruction. The A0 input can be actively driven by
CMOS input signals or tied to VCC or VSS. The R/W bit
is used to set the device to either read or write mode.
Instruction Byte and Register Selection
The next byte sent to the X9110 contains the
instruction and register pointer information. The three
most significant bits are used provide the instruction
opcode (I[2:0]). The RB and RA bits point to one of the
four registers. The format is shown in Table 5.
Internal Slave
Address
Read or
Write Bit
0 0 A0 R/W
(LSB)
Register
Selection
I2 I1 I0
0 RB RA 0
0
(MSB)
RB RA Register
00
01
10
11
DR0
DR1
DR2
DR3
(LSB)
REV 1.1.4 11/13/00
www.xicor.com
Characteristics subject to change without notice. 6 of 21

6 Page









X9110 pdf, datenblatt
X9110 – Preliminary Information
Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used
as a potentiometer.
(2) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a
potentiometer. It is a measure of the error in step size.
(3) MI = RTOT / 1023 or (RH – RL) / 1023, single pot
(4) VCC, V+, V- must reach their final values within 1 msec of each other.
(5) n = 0, 1, 2, …,1023; m =0, 1, 2, …, 1022.
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
Symbol
ICC1
ICC2
ISB
ILI
ILO
VIH
VIL
VOL
VOH
VOH
Parameter
VCC supply current
(active)
VCC supply current
(nonvolatile write)
VCC current (standby)
Input leakage current
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
Output HIGH voltage
Output HIGH voltage
Min.
Limits
Typ. Max.
400
15
3
VCC x 0.7
–1
VCC - 0.8
VCC - 0.4
10
10
VCC + 1
VCC x 0.3
0.4
Units
µA
mA
µA
µA
µA
V
V
V
V
V
Test Conditions
fSCK = 2.5 MHz, SO = Open, VCC = 5.5V
Other Inputs = VSS
fSCK = 2.5MHz, SO = Open, VCC = 5.5V
Other Inputs = VSS
SCK = SI = VSS, Addr. = VSS,
CS = VCC = 5.5V
VIN = VSS to VCC
VOUT = VSS to VCC
IOL = 3mA
IOH = -1mA, VCC +3V
IOH = -0.4mA, VCC +3V
ENDURANCE AND DATA RETENTION
Parameter
Minimum Endurance
Data Retention
Min.
100,000
100
Units
Data changes per bit per register
years
CAPACITANCE
Symbol
CIN/OUT(4)(6)
COUT(6)
CIN(6)
Test
Input/Output capacitance (SI)
Output capacitance (SO)
Input capacitance (A0, CS, WP, HOLD, and SCK)
Max.
8
8
6
Units
pF
pF
pF
Test Conditions
VOUT = 0V
VOUT = 0V
VIN = 0V
POWER-UP TIMING
Symbol
Parameter
Min.
Max.
Units
tr VCC(6)
tPUR(7)
tPUW(7)
VCC Power-up Rate
Power-up to Initiation of read operation
Power-up to Initiation of write operation
0.2
50 V/ms
1 ms
50 ms
Notes: (6) This parameter is not 100% tested
(7) tPUR and tPUW are the delays required from the time the (last) power supply (Vcc-) is stable until the specific instruction can be
issued. These parameters are not 100% tested.
REV 1.1.4 11/13/00
www.xicor.com
Characteristics subject to change without notice. 12 of 21

12 Page





SeitenGesamt 21 Seiten
PDF Download[ X9110 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
X9110Single Digitally-Controlled (XDCP) PotentiometerXicor
Xicor
X9110Single Digitally Controlled PotentiometerIntersil
Intersil
X9111Single Digitally-Controlled PotentiometerXicor
Xicor
X9111Single Digitally Controlled PotentiometerIntersil
Intersil
X9116Digitally Controlled Potentiometer (XDCP)Xicor
Xicor

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche