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Número de pieza | ZC0301 | |
Descripción | VGA & CIF USB PC Camera Controller | |
Fabricantes | ETC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ZC0301 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
No Preview Available ! ZC0301
VGA & CIF USB PC Camera Controller
ZC0301
VGA USB PC Camera Controller
Vimicro Corporation
Preliminary
Data Sheet
Vimicro Corporation reserves the right to make changes without further notice to any product herein to improve reliability,
function or design. Vimicro does not assume any liability arising out of the application or use of any project, circuit described
herein; neither does it convey any license under its patent nor the right of others.
This document contains information of a proprietary nature. None of this information shall be divulged to persons other than
Vimicro Microelectronics Corporation employee authorized by the nature of their duties to receive such information, or
individuals or organizations authorized by Vimicro Corporation.
1 Mar. 2002
1 page 2. Architecture
ZC0301
VGA & CIF USB PC Camera Controller
CMOS
image
sensor
ISP
Sub-
sample &
Raster
JPEG
Encoder
USB
Device
Controller
System Controller
ZC0301
PC
host
Figure 2 ZC0301 Functional Block Diagram
The ZC0301 consists of five major function blocks, System Controller, Image Signal Processor, Sub-Sample & Raster,
JPEG Encoder, and USB Device Controller, as illustrated in Figure 1. These blocks provide the following functions.
2.1. System Controller
• Providing the control to ISP, JPEG, and USB blocks
• Configuring the control registers
• Chip clock generation
• Error control for the data block through USB interface
2.2. Image Signal Processor
• Dedicated sensor control and signal processing module.
• Serial-Bus interface for CMOS Image Sensor
• 8 bit Bayer format image input
• 3x3 Interpolation
• Color Correction
• Gamma Correction
• Automatic Exposure Control
• Automatic White Balance Control
• Programmable AE windows
• Automatic Reset Level Control
• RGB to YCrCb Color Space Convert
• Histogram Equalization Logic
2.3. Sub-Sample & Raster
• The input data format is 4:4:4 for Y component, Cb component and Cr component. The three components for a
pixel are input simultaneously.
5 Mar. 2002
5 Page ZC0301
VGA & CIF USB PC Camera Controller
4.6. Input Signal AC Characteristics
clock
data input
Th
Tsu
valid data
Figure 6 Input Signal Timing AC Characteristics Diagrams
Table 11 Input Signal AC Characteristics
Symbol
Tsu
Th
Parameter
Input setup time
Input hold time
Conditions
Min
18
0
Max Unit
- ns
- ns
5. Register Table (Vendor Commands)
Table 12 System Control Register
Address
0180H
0181H
0183H
0184H
0185H
0186H
0187H
0188H
0189H
018AH
018BH
018DH
018EH
018FH
0190H
0191H
0192H
Symbol
SysCon
SysOp
ImWidthH
ImWidthL
ImHeightH
ImHeightL
TbrcReg
QuanReg
LEVEL1_ADDR
LEVEL2_ADDR
LEVEL3_ADDR
CustomID
FrameConEn
Frame State
LEVEL1Data_add
LEVEL2Data_add
LEVEL3Data_add
Register Name
System control register
System enable register
Image width high byte
Image width low byte
Image height high byte
Image height low byte
JPEG BRC register
JPEG Quantization register
Target image size for state 1
Target image size for state 2
Target image size for state 3
Custom ID
Frame Control Enable
Frame Control State
Hblank value for state 1
Hblank value for state 2
Hblank value for state 3
Default
00H
00H
02H
80H
01H
E0H
00H
00H
40H
60H
80H
01H
0AH
1BH
3CH
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
R/W
RO
R/W
R/W
R/W
11 Mar. 2002
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet ZC0301.PDF ] |
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