Z8018933ASC Datasheet PDF - Zilog.
| Part Number | Z8018933ASC | |
| Description | GENERAL-PURPOSE EMBEDDED CONTROLLERS | |
| Manufacturers | Zilog. | |
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There is a preview and Z8018933ASC download ( pdf file ) link at the bottom of this page. Total 70 Pages | ||
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Zilog
PRELIMINARY
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
PRELIMINARY PRODUCT SPECIFICATION
FEATURES
Part
Z80189
Z8L189
CPU
S180*
S180*
UART
16550
16550
I/O Speed (MHz)
24 33
24 20
s Fully Static Z180™ MPU Core*
– On-Chip 1 MByte MMU
– Two Enhanced UART Channels (up to 512 Kbps)†
– Two Chain-Linked DMA Channels†
– x 2 Clock Multiplier
– Low-Power Consumption Modes
– Two 16-Bit Timer/Counters
– Clocked Serial I/O
– On-Chip Wait State Generator (WSG)
– On-Chip Interrupt Controller
– On-Chip Clock Oscillator/Generator
s 16550 Compatible MIMIC Interface
– 16 mA MIMIC Output Drive Capability
Z80189/Z8L189
GENERAL-PURPOSE
EMBEDDED CONTROLLERS
s Com Port Decode
s PC DMA Mailbox Registers
s Host I/O Mailbox
s Programmable Fixed /ROMCS and
/RAMCS Boundaries
s 100-Pin QFP and VQFP Packages
s 3.3 and 5.0-Volt Operating Ranges
s 0°C to +70°C Temperature Range
Notes:
† Enhancements from the Discrete S180 device.
GENERAL DESCRIPTION
The Z80189/Z8L189 are cost-effective modem controllers
that address a new generation of data pumps having the
HDLC formatting feature. Data pumps of these types do
not require an HDLC interface; therefore, the Z80189 does
not need the ESCC™. The addition of the PC DMA Mailbox
Registers allow DMA data transfer between the PC memory
and the modem speaker/microphone CODEC. The Z80189
is a smart peripheral controller chip for modem (in particu-
lar V.34 applications), fax, voice messaging, and other
communications applications.
The Z80189/Z8L189 consists of an enhanced Z8S180
microprocessor, a 16550 MIMIC with increased MIMIC
drive capability for direct connection to the IBM PC, XT, AT
bus, and 24 bits of parallel I/O. Current PC modem soft-
ware compatibility can be maintained with the Z80189's
ability to mimic the 16550 UART chip. The Z80180 core is
the intelligent controller between the data pump and
16550 MIMIC interface when used in internal applications.
This intelligent controller performs the data compression
and error correction on outgoing and incoming data.
The integration of COM Port Decode circuitry to the Z80189
allows the MIMIC to be selected for a specific COM Port
Address (PC COM Port Address 1-4). COM Port Decode
circuitry is simplified by allowing the user to select the
MIMIC COM Port addresses through software, in addition
to eliminating the need for external circuitry required for
COM Port Decode logic.
The PC DMA and I/O Mailbox Interface can be used to
provide communication paths between the PC Host and
the Z80189. These new communication paths can be used
for voice, DTAD, or jumperless COM Port selection.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
VCC
GND
Device
VDD
VSS
DS971890301
1
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Zilog
PRELIMINARY
ABSOLUTE MAXIMUM RATINGS
Z80189/Z8L189
GENERAL-PURPOSE EMBEDDED CONTROLLERS
Symbol Description
Min
VCC
VIN
TOPR
TSTG
Supply Voltage (*)
Input Voltage
Operating Temp.
Storage Temp.
–0.3
–0.3
0
–55
Notes:
(*) Voltage on all pins with respect to GND.
Max
+7.0
VCC+0.3
70
+150
Units
V
V
°C
°C
Stresses greater than those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the de-
vice. This is a stress rating only; operation of the device at
any condition above those indicated in the operational
sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
STANDARD TEST CONDITIONS
The DC Characteristics and capacitance sections below
apply for the following standard test conditions, unless
otherwise noted. All voltages are referenced to GND (0V).
Positive current flows into the referenced pin (Test Load).
Available operating temperature range is:
S=0°C to 70°C
Voltage Supply Range:
+4.5V
≤
V
CC
≤
+5.5V
+3.0V ≤ VCC ≤ +3.6V
All AC parameters assume a load capacitance of 50 pF.
Add 10 ns delay for each 50 pF increase in load up to a
maximum of 150 pF for the data bus and 100 pF for
address and control lines. AC timing measurements are
referenced to 1.5 volts (except for clock, which is refer-
enced to the 10% and 90% points). Maximum capacitive
load for PHI is 125 pF.
I OL = 2 mA
100 pF
1.4 V
IOH = 250 µA
Figure 4. Test Load Diagram
DS971890301
5
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