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YMF754-V Schematic ( PDF Datasheet ) - ETC

Teilenummer YMF754-V
Beschreibung DS-1E
Hersteller ETC
Logo ETC Logo 




Gesamt 30 Seiten
YMF754-V Datasheet, Funktion
YMF754
DS-1E
Preliminary
OVERVIEW
YMF754 (DS-1E) is a high performance audio controller for the PCI Bus. DS-1E consists of two separated
functional blocks. One is the PCI Audio block and the other is the Legacy Audio block.
PCI Audio block provides 64-voice XG wavetable synthesizer with reverb and variation by using the software
driver from YAMAHA. It also supports DirectSound hardware accelerator, Downloadable Sound (DLS) and
DirectMusic accelerator.
Legacy Audio block supports FM synthesizer, Sound Blaster Pro, MPU401 UART mode and Joystick function
in order to provide hardware compatibility for numerous PC games on real DOS without any software driver.
DS-1E supports the connection to AC’97 which provides high quality DAC, ADC and analog mixer, and it can
connect two AC’97s. In addition, it supports consumer IEC958, Digital Audio Interface (SPDIF In/Out), to
connect external audio equipment by digital.
In addition to support the same functions of YMF744B (DS-1S), DS-1E adds direct recording function for
SPDIF In, and realizes to use SPDIF In and Zoomed Video Port at the same time. And, DS-1E is featured
with the capability of dramatically reducing power consumption at normal operation.
FEATURES
• PCI 2.2 Compliant
• PC98 / PC99 specification Compliant
• PCI Bus Power Management rev. 1.0 Compliant
(Support D0, D2 and D3 state)
• Supports clock run
• PCI Bus Master for PCI Audio
True Full Duplex Playback and Capture with
different Sampling Rate
Maximum 64-voice XG capital Wavetable
Synthesizer including GM compatibility
DirectSound Hardware Acceleration
DirectMusic Hardware Acceleration
Downloadable Sound (DLS) level-1
• Legacy Audio compatibility
FM Synthesizer
Hardware Sound Blaster Pro compatibility
MPU401 UART mode MIDI interface
Joystick
• Supports PC/PCI and Distributed DMA for legacy
DMAC (8237) emulation
• Supports Serialized IRQ
• Supports I2S serial input for Zoomed Video Port
• Supports Consumer IEC958 Port (SPDIF In/Out)
• Supports direct recording function for SPDIF In
• Capability for using SPDIF In and Zoomed Video
Port at the same time.
• Supports AC’97 Interface (AC-Link) Revision 2.1
• AC’97 Digital Docking
• Supports 4-Channel Speaker
• Hardware Volume Control
• EEPROM Interface
• Single Crystal operation (24.576MHz)
• Power supply: 3.3V for I/O (5V tolerant),
2.5V for Internal core logic
• 128-pin LQFP YMF754-V : 0.5mm pin pitch
YMF754-R : 0.4mm pin pitch
The contents of this catalog are target specifications and are subject to change
without prior notice. When using this device, please recheck the specifications.
YAMAHA CORPORATION
YMF754 CATALOG
CATALODGecNeo.m:LbSeI-4r M1F87,5149A9008
June 28, 1999






YMF754-V Datasheet, Funktion
YMF754
3. External Audio Interface (5-pin)
Name
SPDIFOUT
SPDIFIN
ZVBCLK
ZVLRCK
ZVSDI
I/O Type
OT
I Tup
I Tup
I Tup
I Tup
Size
2mA
-
-
-
-
Function
Digital Audio Interface output
Digital Audio Interface input
Zoomed Video Port Bit Clock
Zoomed Video Port L/R Clock
Zoomed Video Port Serial Data
4. Legacy Device Interface (15-pin)
Name
IRQ5
IRQ7
IRQ9
IRQ10
IRQ11
GP[3:0]
GP[7:4]
RXD
TXD
I/O Type
O Ttr
O Ttr
O Ttr
O Ttr
O Ttr
IA
I Tup
I Tup
OT
Size
6mA
6mA
6mA
6mA
6mA
-
-
-
2mA
Function
Interrupt 5 of Legacy Audio
It is directly connected to the interrupt signal of
System I/O chip.
Interrupt 7 of Legacy Audio
Interrupt 9 of Legacy Audio
Interrupt 10 of Legacy Audio
Interrupt 11 of Legacy Audio.
Joystick Port
Joystick Port
MIDI Data Receive
MIDI Data Transfer
5. Miscellaneous (11-pin)
Name
ROMCS
I/O Type
OT
ROMSK / VOLUP# IO Tup
ROMDO / VOLDW# IO
ROMDI
XI24
XO24
LOOPF
I
I
O
I
GPIO[2:0]
IO
TEST#
I
Tup
Tup
C
C
A
Tup
Tup
Size
2mA
2mA
2mA
-
-
-
-
6mA
-
Function
Chip select for external EEPROM
Serial clock for external EEPROM
or Hardware Volume (Up)
Serial data output for external EEPROM
or Hardware Volume (Down)
Serial data input for external EEPROM
24.576 MHz Crystal
24.576 MHz Crystal
Capacitor for PLL
General purpose Input / Output
GPIO2 can use for a reset pin of Secondary AC’97.
LSI Test pin (Do not connect externally.)
June 28, 1999
-6-

6 Page









YMF754-V pdf, datenblatt
YMF754
b6................PER: Parity Error Response
This bit enables DS-1E responses to Parity Error.
“0”: DS-1E ignores all parity errors.
(default)
“1”: DS-1E performs error operation when DS-1E detects a parity error.
b8................SER: SERR# Enable
This bit enables DS-1E to drive SERR#.
“0”: Do not drive SERR#.
(default)
“1”: Drives SERR# when DS-1E detects an Address Parity Error on normal target cycle or a Data Parity
Error on special cycle.
06-07h: Status
Read / Write Clear
Default: 0210h
Access Bus Width: 8, 16, 32-bit
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
DPE SSE RMA RTA STA
DEVT
DPD -
-
- CAP -
-
-
-
b4................CAP: Capability
(Read Only)
This bit indicates that DS-1E supports the capability register. This bit is read only. When 58-59h :
ACPI Mode register, ACPI bit is “0”, the bit is “1”. When ACPI bit is “1”, the bit is “0”.
b8................DPD: Data Parity Error Detected
This bit indicates that DS-1E detects a Data Parity Error during a PCI master cycle.
b[10:9] ........DEVT: DEVSEL Timing (Read Only)
This bit indicates that the decoding speed of DS-1E is Medium.
b11..............STA: Signaled Target Abort
This bit indicates that DS-1E terminates a transaction with Target Abort during a target cycle.
b12..............RTA: Received Target Abort
This bit indicates that a transaction is terminated with Target Abort while DS-1E is in the master memory
cycle.
b13..............RMA: Received Master Abort
This bit indicates that a transaction is terminated with Master Abort while DS-1E is in the master memory
cycle.
b14..............SSE: Signaled System Error
This bit indicates that DS-1E asserts SERR#.
b15..............DPE: Detected Parity Error
This bit indicates that DS-1E detects Address Parity Error or Data Parity Error during a transaction.
June 28, 1999
-12-

12 Page





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