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PDF SM8212 Data sheet ( Hoja de datos )
| Número de pieza | SM8212 | |
| Descripción | POCSAG Decoder For Multiframe Pagers | |
| Fabricantes | Nippon Precision Circuits Inc | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SM8212 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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NIPPON PRECISION CIRCUITS INC.
OVERVIEW
The SM8212B is a POCSAG-standard (Post Office Code
Standardization Advisory Group) signal processor LSI,
which conforms to CCIR recommendation 584 concern-
ing standard international wireless calling codes.
The SM8212B supports call messages in either tone,
numerical or character outputs at signal speeds of 512,
1200 or 2400 bps. The signal input stage features a built-in
filter.
Each of the addresses (max. 8) can be assigned to any
frame, which also makes the device configurable for many
additional services. Each address can be independently set
ON/OFF.
Furthermore, built-in buffer memory means decoded
information can be fetched in sync with the microcon-
troller clock, thereby reducing the microcontroller CPU
time required.
Intermittent-duty method (battery saving (BS) method)
control signals, compatible with PLL operation, and
Molybdenum-gate CMOS structure makes possible the
construction of low-voltage operation, low power dissipa-
tion systems.
The SM8212B is available in 16-pin SSOPs.
FEATURES
SM8212B
POCSAG Decoder For Multiframe Pagers
- BS2 (RF DC-level adjustment signal) before/during
reception selectable adjustment timing
- 1-bit and 2-bit burst error auto-correction function
- 25 to 75% duty factor signal coverage
- 8 rate error detection condition settings
- 76.8 kHz system clock (crystal oscillator)
- 76.8 or 38.4 kHz clock output pin
- Built-in oscillator capacitor and feedback resistor
- 2.0 to 3.5 V operating supply voltage
- Molybdenum-gate CMOS process realizes low power
dissipation
- 16-pin SSOP
PINOUTS (16-pin SSOP)
BS1
BS2
BS3
SIGNAL
XVSS
XT
XTN
VSS
1
8
16 VDD
ATTN
SDI
SDO
SCK
AREA
RSTN
9 CLKO
- Conforms to POCSAG standard for pagers
- 512, 1200 or 2400 bps signal speed
- Multiframe compatible (each address individually
controllable)
- 8 addresses × 4 sub-address (total of 32 addresses)
control
- Built-in buffer memory
- Supports tone, numeric or character call messages
- Built-in input signal filter, with filter ON/OFF and 4
selectable filter characteristics
- PLL-compatible battery saving method (BS1, BS2,
BS3 outputs)
- BS1 (RF control main output signal) 61-step setup
time setting
- BS3 (PLL setup signal) 61-step setup time setting
PACKAGE DIMENSIONS (Unit: mm)
16-pin SSOP (SM8212BM)
0.6TYP
6.8 0.3
0.36 0.1
0.8
0.15+-
0.10
0.05
0 10
0.4 0.2
NIPPON PRECISION CIRCUITS-1
1 page  
SM8212B
AC Characteristics
Parameter
XT clock frequency
XT clock duty cycle
SCK clock pulsewidth
SCK clock interval (except WRITE mode)
SCK clock interval (WRITE mode)
SDI data setup time
SDI data hold time
SDO data setup time
SDO data hold time
ATTN signal setup time
ATTN signal hold time
CLKO clock rise time
CLKO clock fall time
CLKO clock delay time
RSTN pulsewidth
Synbol
fCYXT
DXT
tPWSC
tCYSC
tCYSC
tSSDI
tHSDI
tSSDO
tHSDO
tSATT
tHATT
tRCLK
tFCLK
DCLKO
tPWRS
MIN
-250ppm
25
2
5
5
5
5
1
1
3
0
1
1
(Recommended operating conditions unless otherwise noted)
Rating
TYP MAX
Unit
Condition
76.8 +250ppm
kHz
75 %
150 µs
1900
µs
512bps
830 µs
1200bps
415 µs
2400bps
830 µs
µs
µs
µs
0 µs
µs
µs
500 ns
No load
500 ns
No load
1 µs
ms
ATTN
SCK
SDI
tHATT
tPWSC
tCYSC
1
tSSDI
tHSDI
INPUT
DATA 1
2
INPUT
DATA 2
3
INPUT
DATA 3
Parameter/address set timing
32
INPUT
DATA 32
1/ 2*VDD
ATTN
SCK
SDI
Decoder Mode
tHATT
tPWSC
1
tSSDI
tHSDI
Decoder
Setting1
2
Decoder
Setting 2
tCYSC
Current Mode
START command : 66 bit time max
Others : 2 bit time max
8 1/ 2*VDD
Decoder
Setting 8
Next Mode
Auxiliary operating mode set timing
NIPPON PRECISION CIRCUITS-5
5 Page 
3. Operating Modes
SM8212B
The SM8212B has four operating modes: Power-ON
(Write), Preamble, Idle and Lock modes.
(1) Power-ON mode
After power is applied, the internal registers should be
reset using RSTN.
When ATTN goes HIGH, the decoder sends a write
request for a decoder set read command and then waits for
the microcontroller (decoder set write command timing
starts approximately 50 ms after reset, but for safety, wait
minimum 900ms when Power-ON mode). The internal
operation in write mode takes place at the same timing as
for 1200 bps speed mode.
Write data is prepared in 32-bit batches of 1 parameter
batch and 8 address data batches for a total of 9 batches.
The parameter and address set commands are processed
in sync with the decoder internal clock (1200 Hz). As a
consequence, a gap of 28.4 ms minimum should be left
between batches to provide time for processing.
Alternatively, data can be written by first using the decoder
set read command to confirm whether or not processing is
still in progress (BUSY) before writing each batch. If the
time gap is 28.4 ms or greater, confirmation (READY) is
not required.
After parameters and all addresses have been written and
after decoder processing, the decoder set start command
transfers operation from write mode and starts preamble
mode operation.
When setting parameters and addresses in write mode,
the SCK clock frequency should not be less than 1200 Hz.
If this occurs, the SCK counter is reinitialized. This func-
tion, however, does make restoring operation easy even if
this or another clock is accidentally input.
In write mode, after power is applied and after reset ini-
tialization, all 9 batches (1 parameter and 8 address batch-
es) should be set. If not all batches are set, subsequent
operation may become unstable.
RSTN
SCK
SDI
SDO
BUSY
WRITE MODE
PREAMBLE MODE
1 ms min
READ
DAT A
READY
READ READ
DAT A
BUSY READY
START
max 900ms
max.
1.67ms
max.
28.4ms
129ms max
: 8-bit unit time clock
: 8-bit unit time data
: 8-bit unit time indeterminate data
129ms max
D A T A : 32-bit unit time parameter/address data
Refer to the AC Characteristics section for detailed timing specifications.
Figure 4. Power-ON (WRITE) mode timing
NIPPON PRECISION CIRCUITS-11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SM8212.PDF ] | |
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