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PDF SM5841HS Data sheet ( Hoja de datos )

Número de pieza SM5841HS
Descripción Audio Multi-function Digital Filter
Fabricantes Nippon Precision Circuits Inc 
Logotipo Nippon Precision Circuits Inc Logotipo



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No Preview Available ! SM5841HS Hoja de datos, Descripción, Manual

NIPPON PRECISION CIRCUITS INC.
SM5841H
Audio Multi-function Digital Filter
OVERVIEW
The SM5841H is an 8-times oversampling (interpo-
lation) digital filter for digital audio reproduction
equipment. It accepts 16 or 18-bit input data, and
outputs data in 16, 18 or 20-bit format, making a
wide range of interfaces possible. It also features
digital deemphasis for 3 sampling frequencies, a
noise shaper to reduce quantization noise, a DC off-
set output and other circuits.
ORDERING INFOMATION
Device
SM5841HP
SM5841HS
Package
18pin DIP
22pin SOP
FEATURES
Functions
s 2-channel processing
s 8-times (8fs) oversampling (interpolation)
s Digital deemphasis (fs = 48/44.1/32 kHz)
s Serial input data
2s complement, MSB first, 16/18-bit
s Serial output data
2s complement, MSB first, 16/18/20-bit
s 1st-order noise shaper (for 16/18-bit output only)
s 256fs/384fs system clock selectable
s Output data DC offset (approximately 0.8%)
ON/OFF control
s TTL-compatible input/outputs
s 5 V (standard) supply
s 3.2 V operating voltage
s Molybdenum-gate CMOS
Filter Characteristics
s 3-stage DC FIR interpolation filter
1st stage (fs 2fs), 69-tap
2nd stage (2fs 4fs), 13-tap
3rd stage (4fs 8fs), 9-tap
s IIR deemphasis filter for gain and phase character-
istics close to those of analog filters
s Overflow limiter built-in
APPLICATIONS
s Digital amplifiers
s CD players
s DAT players
s DBS systems
s PCM systems
NIPPON PRECISION CIRCUITS—1

1 page




SM5841HS pdf
SM5841H
DC Electrical Characteristics
Standard voltage: VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = 20 to 80 °C
Parameter
Symbol
Condition
Current consumption
HIGH-level input voltage2
LOW-level input voltage2
CKI AC-coupled input voltage
HIGH-level input voltage3
LOW-level input voltage3
HIGH-level output voltage4
LOW-level output voltage4
CKI HIGH-level input current
CKI LOW-level input current
LOW-level input current3
Input leakage current2, 3
Input leakage current2
IDD
VIH1
VIL1
VINAC
VIH2
VIL2
VOH
VOL
IIH1
IIL1
IIL2
ILH
ILL
VDD = 5.0 V1
Sine wave input
IOH = 0.4 mA
IOL = 1.6 mA
VIN = VDD
VIN = 0 V
VIN = 0 V
VIN = VDD
VIN = 0 V
1. fSYS = 384fs = 20 MHz, no output load
2. Pins CKSL, OFST
3. Pins LRCI, DIN, BCKI, DSF1, DSF2, WSL1, WSL2, RST
4. Pins CKO, DOL, DOR, BCKO, WCKO
Low voltage: VDD = 3.2 to 4.5 V, VSS = 0 V, Ta = 20 to 80 °C
min
0.7VDD
0.3VDD
2.4
2.5
Parameter
Symbol
Condition
Current consumption
HIGH-level input voltage2
LOW-level input voltage2
CKI AC-coupled input voltage
HIGH-level input voltage3
LOW-level input voltage3
HIGH-level output voltage4
LOW-level output voltage4
CKI HIGH-level input current
CKI LOW-level input current
LOW-level input current3
Input leakage current2, 3
Input leakage current2
IDD
VIH1
VIL1
VINAC
VIH2
VIL2
VOH
VOL
IIH1
IIL1
IIL2
ILH
ILL
VDD = 3.4 V1
Sine wave input
IOH = 0.2 mA
IOL = 0.8 mA
VIN = VDD
VIN = 0 V
VIN = 0 V
VIN = VDD
VIN = 0 V
1. fSYS = 384fs = 18.5 MHz, no output load
2. Pins CKSL, OFST
3. Pins LRCI, DIN, BCKI, DSF1, DSF2, WSL1, WSL2, RST
4. Pins CKO, DOL, DOR, BCKO, WCKO
min
0.7VDD
0.3VDD
2.4
2.5
Rating
typ
10
10
10
Rating
typ
max
40
0.3VDD
0.5
0.4
20
20
20
1.0
1.0
max
20
0.3VDD
0.5
0.4
12
12
12
1.0
1.0
Unit
mA
V
V
Vp-p
V
V
V
V
µA
µA
µA
µA
µA
Unit
mA
V
V
Vp-p
V
V
V
V
µA
µA
µA
µA
µA
NIPPON PRECISION CIRCUITS—5

5 Page





SM5841HS arduino
SM5841H
FUNCTIONAL DESCRIPTION
The basic arithmetic block is shown in figure 1, and
the function of each block is described in the follow-
ing sections.
Input
fs
Deemphasis IIR filter
fs
fs
Attenuator
fs
1st FIR
69th - order
2 × interpolator
2fs
2nd FIR
13th - order
2 × interpolator
4fs
3rd FIR
9th - order
2 × interpolator
8fs
Output
Figure 1. Arithmetic block diagram
8-times Oversampling (Interpolation)
Digital Deemphasis (DSF1, DSF2)
The interpolation arithmetic block is comprised of 3
cascaded, 2-times FIR interpolation filters, as shown
in figure 1.
The input signal is sampled at rate fs, and then 8-
times oversampling data is output. Sampling noise in
the 0.5465fs to 7.4535fs stopband is removed by the
interpolation filter.
The digital deemphasis filter has the same construc-
tion as analog filters. It is implemented as an IIR fil-
ter to faithfully reproduce the gain and phase
characteristics of standard analog deemphasis filters.
The filter coefficients for fs = 32.0/44.1/48.0 kHz
sampling frequency are selected by DSF1 and DSF2
when the sampling frequency is specified, as shown
in the following table.
DSF1
LOW
LOW
HIGH
HIGH
DSF2
LOW
HIGH
LOW
HIGH
Deemphasis Sampling frequency
On 44.1 kHz
On 48.0 kHz
Off –
On 32.0 kHz
NIPPON PRECISION CIRCUITS—11

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