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K9F2808U0B-V Schematic ( PDF Datasheet ) - Samsung semiconductor

Teilenummer K9F2808U0B-V
Beschreibung 16M x 8 Bit NAND Flash Memory
Hersteller Samsung semiconductor
Logo Samsung semiconductor Logo 




Gesamt 29 Seiten
K9F2808U0B-V Datasheet, Funktion
K9F2808Q0B-DCB0,DIB0 K9F2808U0B-YCB0,YIB0
K9F2808U0B-VCB0,VIB0 K9F2808U0B-DCB0,DIB0
Document Title
16M x 8 Bit NAND Flash Memory
FLASH MEMORY
Revision History
Revision No. History
0.0 Initial issue.
Draft Date
May 28’th 2001
0.1 K9F2808U0B(3.3V device)’s qualification is finished
Jun. 30th 2001
0.2 K9F2808Q0B (1.8V device)
- Changed typical read operation current (Icc1) from 8mA to 5mA
Jul. 30th 2001
- Changed typical program operation current (Icc2) from 8mA to 5mA
- Changed typical erase operation current (Icc3) from 8mA to 5mA
- Changed typical program time(tPROG) from 200us to 300us
- Changed ALE to RE Delay (ID read, tAR1) from 100ns to 20ns
- Changed CLE hold time(tCLH) from 10ns to 15ns
- Changed CE hold time(tCH) from 10ns to 15ns
- Changed ALE hold time(tALH) from 10ns to 15ns
- Changed Data hold time(tDH) from 10ns to 15ns
- Changed CE Access time(tCEA) from 45ns to 60ns
- Changed Read cycle time(tRC) from 50ns to 70ns
- Changed Write Cycle time(tWC) from 50ns to 70ns
- Changed RE Access time(tREA) from 35ns to 40ns
- Changed RE High Hold time(tREH) from 15ns to 20ns
- Changed WE High Hold time(tWH) from 15ns to 20ns
0.3 1. Device Code is changed
- TBGA package information : ’B’ --> ’D’
ex) K9F2808Q0B-BCB0 ,BIB0 --> K9F2808Q0B-DCB0,DIB0
K9F2808U0B-BCB0 ,BIB0 --> K9F2808Q0B-DCB0,DIB0
2. VIH ,VIL of K9F2808Q0B(1.8 device) is changed
Aug. 23th 2001
(before revision)
Input High Voltage
I/O pins
VccQ-0.4
VIH
Except I/O pins VCC-0.4
-
VccQ
VCC
Input Low Voltage,
All inputs
V IL
-
0 - 0.4
(after revision)
Input High Voltage
I/O pins
VccQ-0.4
VIH
Except I/O pins VCC-0.4
-
Input Low Voltage,
All inputs
V IL
-
-0.3 -
VccQ
+0.3
VCC
+0.3
0.4
Remark
Advance
K9F2808Q0B
: Preliminary
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
1






K9F2808U0B-V Datasheet, Funktion
K9F2808Q0B-DCB0,DIB0 K9F2808U0B-YCB0,YIB0
K9F2808U0B-VCB0,VIB0 K9F2808U0B-DCB0,DIB0
PIN CONFIGURATION (WSOP1)
K9F2808U0B-VCB0/VIB0
N.C
N.C
DNU
N.C
N.C
N.C
R/B
RE
CE
DNU
N.C
Vcc
Vss
N.C
DNU
CLE
ALE
WE
WP
N.C
N.C
DNU
N.C
N.C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
FLASH MEMORY
48 N.C
47 N.C
46 DNU
45 N.C
44 I/O7
43 I/O6
42 I/O5
41 I/O4
40 N.C
39 DNU
38 N.C
37 Vcc
36 Vss
35 N.C
34 DNU
33 N.C
32 I/O3
31 I/O2
30 I/O1
29 I/O0
28 N.C
27 DNU
26 N.C
25 N.C
PACKAGE DIMENSIONS
48-PIN LEAD PLASTIC VERY VERY THIN SMALL OUT-LINE PACKAGE TYPE (I)
48 - WSOP1 - 1217F
Unit :mm
15.40± 0.10
0.70 MAX
0.58± 0.04
#1 #48
#24 #25
(0.1Min)
17.00 ±0.20
6
0.45~0.75

6 Page









K9F2808U0B-V pdf, datenblatt
K9F2808Q0B-DCB0,DIB0 K9F2808U0B-YCB0,YIB0
K9F2808U0B-VCB0,VIB0 K9F2808U0B-DCB0,DIB0
FLASH MEMORY
AC Timing Characteristics for Command / Address / Data Input
Parameter
Symbol
K9F2808Q0B
Min Max
K9F2808U0B
Min Max
CLE Set-up Time
tCLS
0
-
0
-
CLE Hold Time
CE Setup Time
tCLH
20
-
10
-
tCS 0 - 0 -
CE Hold Time
tCH 20 - 10 -
WE Pulse Width
tWP
25 (1)
-
25
-
ALE Setup Time
ALE Hold Time
Data Setup Time
tALS
0
-
0
-
tALH
20
-
10
-
tDS 20 - 20 -
Data Hold Time
tDH 20 - 10 -
Write Cycle Time
tWC 70 - 50 -
WE High Hold Time tWH 20 - 15 -
NOTE :
1. If tCS is set less than 10ns, tWP must be minimum 35ns, otherwise, tWP may be minimum 25ns.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC Characteristics for Operation
Parameter
Symbol
K9F2808Q0B
Min Max
Data Transfer from Cell to Register
ALE to RE Delay( ID read )
tR
tAR1
-
20
10
-
ALE to RE Delay(Read cycle)
CLE to RE Delay
Ready to RE Low
RE Pulse Width
tAR2
tCLR
tRR
tRP
50
50
20
35
-
-
-
-
WE High to Busy
Read Cycle Time
CE Access Time
RE Access Time
tWB
tRC
tCEA
tREA
-
70
-
-
150
-
60
45
RE High to Output Hi-Z
CE High to Output Hi-Z
RE High Hold Time
Output Hi-Z to RE Low
tRHZ
tCHZ
tREH
tIR
15
-
20
0
30
20
-
-
WE High to RE Low
Device Resetting Time(Read/Program/Erase)
Last RE High to Busy
(at sequential read)
tWHR
tRST
60 -
- 5/10/500(1)
tRB -
100
K9F2808U0B-Y
only
CE High to Ready(in case of inter-
ception by CE at read)
CE High Hold Time(at the last
serial read)(2)
tCRY
tCEH
- 50 +tr(R/B)(3)
100 -
NOTE :
1. If reset command(FFh) is written at Ready state, the device goes into Busy for maximum 5us.
2. To break the sequential read cycle, CE must be held high for longer time than tCEH.
3. The time to Ready depends on the value of the pull-up resistor tied R/B pin.
K9F2808U0B
Min Max
- 10
20 -
50 -
50 -
20 -
25 -
- 100
50 -
- 45
- 35
15 30
- 20
15 -
0-
60 -
- 5/10/500 (1)
- 100
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
-
50 +tr(R/B)(3)
ns
100 - ns
12

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