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PDF JM38510 Data sheet ( Hoja de datos )
| Número de pieza | JM38510 | |
| Descripción | Internally Trimmed Precision IC Multiplier | |
| Fabricantes | Analog Devices | |
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a
Internally Trimmed
Integrated Circuit Multiplier
AD532
FEATURES
Pretrimmed to ؎1.0% (AD532K)
No External Components Required
Guaranteed ؎1.0% max 4-Quadrant Error (AD532K)
Diff Inputs for (X1 – X2) (Y1 – Y2)/10 V Transfer Function
Monolithic Construction, Low Cost
APPLICATIONS
Multiplication, Division, Squaring, Square Rooting
Algebraic Computation
Power Measurements
Instrumentation Applications
Available in Chip Form
PRODUCT DESCRIPTION
The AD532 is the first pretrimmed single chip monolithic multi-
plier/divider. It guarantees a maximum multiplying error of
± 1.0% and a ± 10 V output voltage without the need for any
external trimming resistors or output op amp. Because the
AD532 is internally trimmed, its simplicity of use provides
design engineers with an attractive alternative to modular multi-
pliers, and its monolithic construction provides significant ad-
vantages in size, reliability and economy. Further, the AD532
can be used as a direct replacement for other IC multipliers that
require external trim networks (such as the AD530).
FLEXIBILITY OF OPERATION
The AD532 multiplies in four quadrants with a transfer func-
tion of (X1 – X2)(Y1 – Y2)/10 V, divides in two quadrants with
a 10 V Z/(X1 – X2) transfer function, and square roots in one
quadrant with a transfer function of ±√ 10 V Z. In addition to
these basic functions, the differential X and Y inputs provide
significant operating flexibility both for algebraic computation and
transducer instrumentation applications. Transfer functions,
such as XY/10 V, (X2 – Y2)/10 V, ± X2/10 V and 10 V Z/(X1 – X2),
are easily attained and are extremely useful in many modulation
and function generation applications, as well as in trigonometric
calculations for airborne navigation and guidance applications,
where the monolithic construction and small size of the AD532
offer considerable system advantages. In addition, the high
CMRR (75 dB) of the differential inputs makes the AD532
especially well qualified for instrumentation applications, as it
can provide an output signal that is the product of two transducer-
generated input signals.
PIN CONFIGURATIONS
Y2
Y1 VOS
+VS GND
AD532
TOP VIEW
Z (Not to Scale) X2
OUT
–VS
X1
Z1
14 +VS
OUT 2
13 Y1
–VS 3 AD532 12 Y2
NC 4 TOP VIEW 11 VOS
NC 5 (Not to Scale) 10 GND
NC 6
X1 7
9 X2
8 NC
NC = NO CONNECT
3 2 1 20 19
–VS 4
NC 5
NC 6
NC 7
NC 8
AD532
TOP VIEW
(Not to Scale)
18 Y2
17 NC
16 VOS
15 NC
14 GND
9 10 11 12 13
NC = NO CONNECT
GUARANTEED PERFORMANCE OVER TEMPERATURE
The AD532J and AD532K are specified for maximum multi-
plying errors of ±2% and ±1% of full scale, respectively at
+25°C, and are rated for operation from 0°C to +70°C. The
AD532S has a maximum multiplying error of ± 1% of full scale
at +25°C; it is also 100% tested to guarantee a maximum error
of ±4% at the extended operating temperature limits of –55°C
and +125°C. All devices are available in either the hermetically-
sealed TO-100 metal can, TO-116 ceramic DIP or LCC packages.
J, K and S grade chips are also available.
ADVANTAGES OF ON-THE-CHIP TRIMMING OF THE
MONOLITHIC AD532
1. True ratiometric trim for improved power supply rejection.
2. Reduced power requirements since no networks across sup-
plies are required.
3. More reliable since standard monolithic assembly techniques
can be used rather than more complex hybrid approaches.
4. High impedance X and Y inputs with negligible circuit
loading.
5. Differential X and Y inputs for noise rejection and additional
computational flexibility.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
1 page  
AD532
DYNAMIC CHARACTERISTICS
The closed loop frequency response of the AD532 in the multi-
plier mode typically exhibits a 3 dB bandwidth of 1 MHz and
rolls off at 6 dB/octave thereafter. Response through all inputs is
essentially the same as shown in Figure 7. In the divide mode,
the closed loop frequency response is a function of the absolute
value of the denominator voltage as shown in Figure 8.
Stable operation is maintained with capacitive loads to 1000 pF
in all modes, except the square root for which 50 pF is a safe
upper limit. Higher capacitive loads can be driven if a 100 Ω
resistor is connected in series with the output for isolation.
NOISE CHARACTERISTICS
All AD532s are screened on a sampling basis to assure that
output noise will have no appreciable effect on accuracy. Typi-
cal spot noise vs. frequency is shown in Figure 10.
Figure 8. Frequency Response, Dividing
POWER SUPPLY CONSIDERATIONS
Although the AD532 is tested and specified with ± 15 V dc
supplies, it may be operated at any supply voltage from ± 10 V
to ± 18 V for the J and K versions, and ± 10 V to ± 22 V for the S
version. The input and output signals must be reduced propor-
tionately to prevent saturation; however, with supply voltages
below ± 15 V, as shown in Figure 9. Since power supply sensitiv-
ity is not dependent on external null networks as in the AD530
and other conventionally nulled multipliers, the power supply
rejection ratios are improved from 3 to 40 times in the AD532.
Figure 10. Spot Noise vs. Frequency
APPLICATIONS CONSIDERATIONS
The performance and ease of use of the AD532 is achieved
through the laser trimming of thin-film resistors deposited di-
rectly on the monolithic chip. This trimming-on-the-chip tech-
nique provides a number of significant advantages in terms of
cost, reliability and flexibility over conventional in-package
trimming of off-the-chip resistors mounted or deposited on a
hybrid substrate.
First and foremost, trimming on the chip eliminates the need
for a hybrid substrate and the additional bonding wires that are
required between the resistors and the multiplier chip. By trim-
ming more appropriate resistors on the AD532 chip itself, the
second input terminals that were once committed to external
trimming networks (e.g., AD530) have been freed to allow fully
differential operation at both the X and Y inputs. Further, the
requirement for an input attenuator to adjust the gain at the Y
input has been eliminated, letting the user take full advantage of
the high input impedance properties of the input differential
amplifiers. Thus, the AD532 offers greater flexibility for both
algebraic computation and transducer instrumentation
applications.
Finally, provision for fine trimming the output voltage offset has
been included. This connection is optional, however, as the
AD532 has been factory-trimmed for total performance as
described in the listed specifications.
REPLACING OTHER IC MULTIPLIERS
Existing designs using IC multipliers that require external trim-
ming networks (such as the AD530) can be simplified using the
pin-for-pin replaceability of the AD532 by merely grounding
the X2, Y2 and VOS terminals. (The VOS terminal should always
be grounded when unused.)
Figure 9. Signal Swing vs. Supply
REV. B
–5–
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