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JM38510 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer JM38510
Beschreibung Internally Trimmed Integrated Circuit Multiplier
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 7 Seiten
JM38510 Datasheet, Funktion
a
Internally Trimmed
Integrated Circuit Multiplier
AD532
FEATURES
Pretrimmed to ؎1.0% (AD532K)
No External Components Required
Guaranteed ؎1.0% max 4-Quadrant Error (AD532K)
Diff Inputs for (X1 – X2) (Y1 – Y2)/10 V Transfer Function
Monolithic Construction, Low Cost
APPLICATIONS
Multiplication, Division, Squaring, Square Rooting
Algebraic Computation
Power Measurements
Instrumentation Applications
Available in Chip Form
PRODUCT DESCRIPTION
The AD532 is the first pretrimmed single chip monolithic multi-
plier/divider. It guarantees a maximum multiplying error of
± 1.0% and a ± 10 V output voltage without the need for any
external trimming resistors or output op amp. Because the
AD532 is internally trimmed, its simplicity of use provides
design engineers with an attractive alternative to modular multi-
pliers, and its monolithic construction provides significant ad-
vantages in size, reliability and economy. Further, the AD532
can be used as a direct replacement for other IC multipliers that
require external trim networks (such as the AD530).
FLEXIBILITY OF OPERATION
The AD532 multiplies in four quadrants with a transfer func-
tion of (X1 – X2)(Y1 – Y2)/10 V, divides in two quadrants with
a 10 V Z/(X1 – X2) transfer function, and square roots in one
quadrant with a transfer function of ±√ 10 V Z. In addition to
these basic functions, the differential X and Y inputs provide
significant operating flexibility both for algebraic computation and
transducer instrumentation applications. Transfer functions,
such as XY/10 V, (X2 – Y2)/10 V, ± X2/10 V and 10 V Z/(X1 – X2),
are easily attained and are extremely useful in many modulation
and function generation applications, as well as in trigonometric
calculations for airborne navigation and guidance applications,
where the monolithic construction and small size of the AD532
offer considerable system advantages. In addition, the high
CMRR (75 dB) of the differential inputs makes the AD532
especially well qualified for instrumentation applications, as it
can provide an output signal that is the product of two transducer-
generated input signals.
PIN CONFIGURATIONS
Y2
Y1 VOS
+VS GND
AD532
TOP VIEW
Z (Not to Scale) X2
OUT
–VS
X1
Z1
14 +VS
OUT 2
13 Y1
–VS 3 AD532 12 Y2
NC 4 TOP VIEW 11 VOS
NC 5 (Not to Scale) 10 GND
NC 6
X1 7
9 X2
8 NC
NC = NO CONNECT
3 2 1 20 19
–VS 4
NC 5
NC 6
NC 7
NC 8
AD532
TOP VIEW
(Not to Scale)
18 Y2
17 NC
16 VOS
15 NC
14 GND
9 10 11 12 13
NC = NO CONNECT
GUARANTEED PERFORMANCE OVER TEMPERATURE
The AD532J and AD532K are specified for maximum multi-
plying errors of ±2% and ±1% of full scale, respectively at
+25°C, and are rated for operation from 0°C to +70°C. The
AD532S has a maximum multiplying error of ± 1% of full scale
at +25°C; it is also 100% tested to guarantee a maximum error
of ±4% at the extended operating temperature limits of –55°C
and +125°C. All devices are available in either the hermetically-
sealed TO-100 metal can, TO-116 ceramic DIP or LCC packages.
J, K and S grade chips are also available.
ADVANTAGES OF ON-THE-CHIP TRIMMING OF THE
MONOLITHIC AD532
1. True ratiometric trim for improved power supply rejection.
2. Reduced power requirements since no networks across sup-
plies are required.
3. More reliable since standard monolithic assembly techniques
can be used rather than more complex hybrid approaches.
4. High impedance X and Y inputs with negligible circuit
loading.
5. Differential X and Y inputs for noise rejection and additional
computational flexibility.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999






JM38510 Datasheet, Funktion
AD532
APPLICATIONS
MULTIPLICATION
X1
X2
Y1
Y2
(OPTIONAL)
Z
AD532 OUT
VOUT
VOS
20k
VOUT
=
(X1
X2) (Y1
10V
Y2)
+VS –VS
Figure 11. Multiplier Connection
For operation as a multiplier, the AD532 should be connected
as shown in Figure 11. The inputs can be fed differentially to
the X and Y inputs, or single-ended by simply grounding the
unused input. Connect the inputs according to the desired po-
larity in the output. The Z terminal is tied to the output to close
the feedback loop around the op amp (see Figure 1). The offset
adjust VOS is optional and is adjusted when both inputs are zero
volts to obtain zero out, or to buck out other system offsets.
SQUARE
X1 Z
X2
AD532
OUT
Y1
Y2 +VS VOS –VS
VOUT
VOUT
=
VIN2
10V
VIN (OPTIONAL)
20k
+VS –VS
Figure 12. Squarer Connection
The squaring circuit in Figure 12 is a simple variation of the
multiplier. The differential input capability of the AD532, how-
ever, can be used to obtain a positive or negative output re-
sponse to the input . . . a useful feature for control applications,
as it might eliminate the need for an additional inverter somewhere
else.
DIVISION
Z
VOUT =
10VZ
X
X X1
Z
X2
AD532
Y1
OUT
VOUT
Y2 +VS
–VS
1k
(SF)
2.2k
47k
20k
(X0)
+VS –VS
10k
Figure 13. Divider Connection
The AD532 can be configured as a two-quadrant divider by
connecting the multiplier cell in the feedback loop of the op
amp and using the Z terminal as a signal input, as shown in
Figure 13. It should be noted, however, that the output error is
given approximately by 10 V m/(X1 – X2), where m is the total
error specification for the multiply mode; and bandwidth by
fm × (X1 – X2)/10 V, where fm is the bandwidth of the multiplier.
Further, to avoid positive feedback, the X input is restricted to
negative values. Thus for single-ended negative inputs (0 V to
–10 V), connect the input to X and the offset null to X2; for
single-ended positive inputs (0 V to +10 V), connect the input
to X2 and the offset null to X1. For optimum performance, gain
(S.F.) and offset (X0) adjustments are recommended as shown
and explained in Table I.
For practical reasons, the useful range in denominator input is
approximately 500 mV |(X1 – X2)| 10 V. The voltage offset
adjust (VOS), if used, is trimmed with Z at zero and (X1 – X2) at
full scale.
Table I. Adjust Procedure (Divider or Square Rooter)
DIVIDER
SQUARE ROOTER
Adjust
Adjust
With:
for: With: for:
Adjust
XZ
VOUT
Scale Factor –10 V +10 V –10 V
X0 (Offset) –1 V +0.1 V –1 V
Z
+10 V
+0.1 V
VOUT
–10 V
–1 V
Repeat if required.
SQUARE ROOT
Z
VOUT = 10VZ
X1 Z
X2
AD532
Y1
OUT
VOUT
Y2 +VS
–VS
1k
(SF)
2.2k
47k
20k
(X0)
+VS –VS
10k
Figure 14. Square Rooter Connection
The connections for square root mode are shown in Figure 14.
Similar to the divide mode, the multiplier cell is connected in
the feedback of the op amp by connecting the output back to
both the X and Y inputs. The diode D1 is connected as shown
to prevent latch-up as ZIN approaches 0 volts. In this case, the
VOS adjustment is made with ZIN = +0.1 V dc, adjusting VOS to
obtain –1.0 V dc in the output, VOUT = – 10 V Z. For optimum
performance, gain (S.F.) and offset (X0) adjustments are recom-
mended as shown and explained in Table I.
DIFFERENCE OF SQUARES
X X1 Z
X2
AD532
OUT
VOUT
Y
20k
20k
Y1
–Y Y2 +VS VOS –VS
VOUT =
X2 – Y2
10V
10k
AD741KH
(OPTIONAL)
20k
+VS –VS
Figure 15. Differential of Squares Connection
The differential input capability of the AD532 allows for the
algebraic solution of several interesting functions, such as the
difference of squares, X2 – Y2/10 V. As shown in Figure 15, the
AD532 is configured in the square mode, with a simple unity
gain inverter connected between one of the signal inputs (Y)
and one of the inverting input terminals (–YIN) of the multiplier.
The inverter should use precision (0.1%) resistors or be other-
wise trimmed for unity gain for best accuracy.
–6– REV. B

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