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PDF ISL6525 Data sheet ( Hoja de datos )
| Número de pieza | ISL6525 | |
| Descripción | Buck and Synchronous-Rectifier Pulse-Width Modulator (PWM) Controller | |
| Fabricantes | Intersil Corporation | |
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TM
Data Sheet
ISL6525
March 2001 File Number 4998.1
Buck and Synchronous-Rectifier
Pulse-Width Modulator (PWM) Controller
The ISL6525 provides complete control and protection for a
DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive two
N Channel MOSFETs in a synchronous-rectified buck
topology. The ISL6525 integrates all of the control, output
adjustment, monitoring and protection functions into a single
package. A programmable delay time for the PGOOD signal
makes it especially suitable for the VTT regulation in
VRM8.5 applications.
The output voltage of the converter can be precisely
regulated to as low as 1.20V, with a maximum tolerance of
±1% over temperature and line voltage variations.
The ISL6525 provides simple, single feedback loop, voltage-
mode control with fast transient response. It includes a
200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/µs slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0% to 100%.
The ISL6525 protects against over-current conditions by
inhibiting PWM operation. The ISL6525 monitors the current
by using the rDS(ON) of the upper MOSFET which eliminates
the need for a current sensing resistor.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
ISL6525CB
0 to 70 14 Ld SOIC
PKG.
NO.
M14.15
Features
• Drives Two N-Channel MOSFETs
• Operates From +5V or +12V Input
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- 1.20V Internal Reference
- ±1% Over Line Voltage and Temperature
• Programmable delay for PGOOD signal
• Over-Current Fault Monitor
- Does Not Require Extra Current Sensing Element
- Uses MOSFETs rDS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable from
50kHz to Over 1MHz
• 14 Pin, SOIC Package
Applications
• Power Supply for Various Microprocessors
• VTT Regulation for VRM8.5
• High-Power 5V to 3.xV DC-DC Regulators
• Low-Voltage Distributed Power Supplies
Pinout
ISL6525
(SOIC)
TOP VIEW
RT 1
OCSET 2
SS 3
COMP 4
FB 5
GND 6
PGOOD 7
14 DELAY
13 VCC
12 LGATE
11 PGND
10 BOOT
9 UGATE
8 PHASE
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, All Rights Reserved
1 page  
ISL6525
PGOOD signal, not the falling edge. An internal hysteresis
guarantees glitch-free transition of PGOOD. Refer to
Programming PGOOD Delay Time section for more
information.
Functional Description
Initialization
The ISL6525 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary. The
Power-On Reset (POR) function continually monitors the input
supply voltages. The POR monitors the bias voltage at the VCC
pin and the input voltage (VIN) on the OCSET pin. The level on
OCSET is equal to VIN less a fixed voltage drop (see over-
current protection). The POR function initiates soft start
operation after both input supply voltages exceed their POR
thresholds. For operation with a single +12V power source, VIN
and VCC are equivalent and the +12V power source must
exceed the rising VCC threshold before POR initiates operation.
Soft Start
The POR function initiates the soft start sequence. An internal
10µA current source charges an external capacitor (CSS) on
the SS pin to 4V. Soft start clamps the error amplifier output
(COMP pin) and reference input (+ terminal of error amp) to
the SS pin voltage. Figure 3 shows the soft start interval with
CSS = 0.1µF. Initially the clamp on the error amplifier (COMP
pin) controls the converter’s output voltage. At t1 in Figure 3,
the SS voltage reaches the valley of the oscillator’s triangle
wave. The oscillator’s triangular waveform is compared to the
ramping error amplifier voltage. This generates PHASE
pulses of increasing width that charge the output capacitor(s).
This interval of increasing pulse width continues to t2. With
sufficient output voltage, the clamp on the reference input
controls the output voltage. This is the interval between t2 and
t3 in Figure 3. At t3 the SS voltage exceeds the reference
voltage and the output voltage is in regulation. This method
provides a rapid and controlled output voltage rise.
Over-Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFETs on-resistance,
rDS(ON) to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (ROCSET)
programs the over-current trip level. An internal 200µA (typical)
current sink develops a voltage across ROCSET that is
reference to VIN. When the voltage across the upper MOSFET
(also referenced to VIN) exceeds the voltage across ROCSET,
the over-current function initiates a soft-start sequence. The
soft-start function discharges CSS with a 10µA current sink and
inhibits PWM operation. The soft-start function recharges CSS,
and PWM operation resumes with the error amplifier clamped
to the SS voltage. Should an overload occur while recharging
CSS, the soft start function inhibits PWM operation while fully
charging CSS to 4V to complete its cycle. Figure 4 shows this
operation with an overload condition. Note that, in this particular
application, the inductor current increases to over 15A during
the CSS charging interval and causes an over-current trip. The
converter dissipates very little power with this method. The
measured average input power for the conditions of Figure 4 is
2.5W.
4V
2V
0V
15A
10A
5A
0A
SOFT-START
(1V/DIV.)
OUTPUT
VOLTAGE
0V (1V/DIV.)
0V
t1 t2
t3
TIME (5ms/DIV.)
FIGURE 3. SOFT-START INTERVAL
TIME (20ms/DIV.)
FIGURE 4. OVER-CURRENT OPERATION
The over-current function will trip at a peak inductor current
(IPEAK) determined by:
IPEAK = I--O-----C----S----rE--D--T--S---•-(--O-R----NO----)-C----S----E----T--
where IOCSET is the internal OCSET current source (200µA
- typical). The OC trip point varies mainly due to the
MOSFETs rDS(ON) variations. To avoid over-current tripping
in the normal operating load range, find the ROCSET resistor
from the equation above with:
1. The maximum rDS(ON) at the highest junction temperature.
5
5 Page 
ISL6525
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
α
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M14.15 (JEDEC MS-012-AB ISSUE C)
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1 0.0040 0.0098 0.10 0.25
-
B 0.013 0.020 0.33 0.51
9
C
0.0075 0.0098 0.19
0.25
-
D
0.3367 0.3444 8.55
8.75
3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC 1.27 BSC -
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L 0.016 0.050 0.40 1.27
6
N 14
14 7
α 0o 8o 0o 8o -
Rev. 0 12/93
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at website www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. How-
ever, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
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Intersil Corporation
2401 Palm Bay Rd., Mail Stop 53-204
Palm Bay, FL 32905
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
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Mercure Center
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Taipei, Taiwan 104
Republic of China
TEL: 886-2-2515-8508
FAX: 886-2-2515-8369
11
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ISL6525.PDF ] | |
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