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PDF ITF86116SQT Data sheet ( Hoja de datos )

Número de pieza ITF86116SQT
Descripción 10A/ 30V/ 0.012 Ohm/ N-Channel/ Logic Level/ Power MOSFET
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
10A, 30V, 0.012 Ohm, N-Channel, Logic
Level, Power MOSFET
Packaging
TSSOP8
1
23 4
5
Symbol
DRAIN(1)
SOURCE(2)
SOURCE(3)
GATE(4)
DRAIN(8)
SOURCE(7)
SOURCE(6)
DRAIN(5)
ITF86116SQT
March 2000 File Number 4808.2
Features
• Ultra Low On-Resistance
- rDS(ON) = 0.012Ω, VGS = 10V
- rDS(ON) = 0.016Ω, VGS = 4.5V
• Gate to Source Protection Diode
• Simulation Models
- Temperature Compensated PSPICE™ and SABER
Electrical Models
- Spice and SABER Thermal Impedance Models
- www.intersil.com
• Peak Current vs Pulse Width Curve
• Transient Thermal Impedance Curve vs Board Mounting
Area
• Switching Time vs RGS Curves
Ordering Information
PART NUMBER
PACKAGE
BRAND
ITF86116SQT
TSSOP-8
86116
NOTE: When ordering, use the entire part number. ITF86116SQT2
is available only in tape and reel.
Absolute Maximum Ratings TA = 25oC, Unless Otherwise Specified
ITF86116SQT
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous (TA = 25oC, VGS = 10V) (Figure 2) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TA = 25oC, VGS = 4.5V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TA = 100oC, VGS = 4.5V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Power Dissipation (Note 2)
Derate Above 25oC . . . .
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PD
...
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Technical Brief TB370 . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
NOTES:
1. TJ = 25oC to 125oC.
2. 62.5oC/W measured using FR-4 board with 1.00 in2 (645.2 mm2) copper pad at 10 second.
30
30
±20
10.0
9.0
5.0
Figure 4
2
16
-55 to 150
300
260
V
V
V
A
A
A
A
W
mW/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1 CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
SABER© is a Copyright of Analogy Inc. www.intersil.com or 321-724-7143 | Copyright © Intersil Corporation 2000

1 page




ITF86116SQT pdf
ITF86116SQT
Typical Performance Curves (Continued)
1.10
ID = 250µA
3000
1.05
1.00
1000 COSS CDS + CGD
CISS = CGS + CGD
0.95
0.90
-80
-40 0 40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
VGS = 0V, f = 1MHz
100
0.1 1.0
CRSS = CGD
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
VDD = 15V
8
6
4
WAVEFORMS IN
2 DESCENDING ORDER:
ID = 9A
ID = 1A
0
0 10 20 30 40
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
250
VGS = 4.5V, VDD = 15V, ID = 5.0A
200
tr
150
100 tf
50
td(ON)
td(OFF)
0
0 10 20 30 40 50
RGS, GATE TO SOURCE RESISTANCE ()
FIGURE 14. SWITCHING TIME vs GATE RESISTANCE
250
VGS = 10V, VDD = 15V, ID = 10A
200
150
100
50
0
0
td(OFF)
tf
tr
td(ON)
10 20 30 40
RGS, GATE TO SOURCE RESISTANCE ()
50
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
5

5 Page





ITF86116SQT arduino
ITF86116SQT
MO-153AA (TSSOP-8)
8 LEAD JEDEC MO-153AA TSSOP PLASTIC PACKAGE
EA
E1
e
D
A1
L
0.015
0.4
0.035
0.9
b
c
0o- 8o
0.004 IN
0.10mm
0.232
5.9
0.025
0.65
0.077
1.95
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.041
0.047
1.05
1.20
-
A1
0.002
0.006
0.05
0.15
b
0.010
0.012
0.25
0.30
-
-
c 0.005
0.127
-
D
0.114
0.122
2.90
3.10
2
E
0.244
0.260
6.20
6.60
-
E1
0.170
0.177
4.30
4.50
e 0.025 BSC
0.65 BSC
3
-
L
0.020
0.028
0.50
0.70
4
NOTES:
1. These dimensions are within allowable dimensions of Rev. E of
JEDEC MO-153AA outline dated 10-97.
2. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.006 inches (0.15mm) per side.
3. Dimension “E1” does not include inter-lead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.010 inches
(0.25mm) per side.
4. “L” is the length of terminal for soldering.
5. Controlling dimension: Millimeter
6. Revision 2 dated: 1-00.
MO-153AA (TSSOP-8)
12mm TAPE AND REEL
330mm
20.4mm
13mm
53.5mm
13.4mm
1.5mm
DIA. HOLE
12mm
4.0mm
2.0mm
1.75mm
CL
8.0mm
USER DIRECTION OF FEED
COVER TAPE
11
GENERAL INFORMATION
1. 3000 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.

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