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KH561 Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer KH561
Beschreibung Wideband/ Low Distortion Driver Amplifier
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 13 Seiten
KH561 Datasheet, Funktion
KH561
Wideband, Low Distortion Driver Amplifier
www.fairchildsemi.com
Features
s 150MHz bandwidth at +24dBm output
s Low distortion
(2nd/3rd: -59/-62dBc @ 20MHz and 10dBm)
s Output short circuit protection
s User-definable output impedance, gain,
and compensation
s Internal current limiting
s Direct replacement for CLC561
Applications
s Output amplification
s Arbitrary waveform generation
s ATE systems
s Cable/line driving
s Function generators
s SAW drivers
s Flash A/D driving and testing
Frequency Response vs. Output Power
16
Po = 10dBm
14 Vo = 2Vpp
12
Po = 24dBm
Vo = 10Vpp
10 Po = 27.5dBm
Vo = 15Vpp
8
Po = 18dBm
Vo = 5Vpp
6
0 40 80 120 160
Frequency (MHz)
200
V+ 8
+
V- 18
5
10
15
20
-
4 +VCC
19 Compensation
23 Vo
21 -VCC
All undesignated
pins are internally
unconnected. May
be grounded if
desired.
Typical Distortion Performance
Output
Power
10dBm
18dBm
24dBm
20MHz
2nd 3rd
-59 -62
-52 -48
-50 -41
50MHz
2nd 3rd
-52 -60
-45 -46
-36 -32
100MHz
2nd 3rd
-35 -49
-30 -36
-40 -30
General Description
The KH561 is a wideband DC coupled, amplifier that
combines high output drive and low distortion. At
an output of +24dBm (10Vpp into 50), the -3dB
bandwidth is 150MHz. As illustrated in the table
below, distortion performance remains excellent
even when amplifying high-frequency signals to high
output power levels.
With the output current internally limited to 250mA,
the KH561 is fully protected against shorts to ground
and can, with the addition of a series limiting resistor
at the output, withstand shorts to the ±15V supplies.
The KH561 has been designed for maximum flexibility
in a wide variety of demanding applications. The
two resistors comprising the feedback network set
both the gain and the output impedance, without
requiring the series backmatch resistor needed by most
op amps. This allows driving into a matched load
without dropping half the voltage swing through a
series matching resistor. External compensation allows
user adjustment of the frequency response. The
KH561 is specified for both maximally flat frequency
response and 0% pulse overshoot compensations.
The combination of wide bandwidth, high output
power, and low distortion, coupled with gain, output
impedance and frequency response flexibility, makes
the KH561 ideal for waveform generator applications.
Excellent stability driving capacitive loads yields
superior performance driving ADC’s, long transmission
lines, and SAW devices. A companion part, the
KH560, offers superior pulse fidelity for high accuracy
DC coupled applications.
The KH561 is constructed using thin film resistor/bipolar
transistor technology, and is available in the following
versions:
KH561AI
KH561AK
KH561AM
-25°C to +85°C
-55°C to +125°C
-55°C to +125°C
24-pin Ceramic DIP
24-pin Ceramic DIP,
features burn-in
and hermetic testing
24-pin Ceramic DIP,
environmentally screened
and electronically tested
to MIL-STD-883
REV. 1A February 2001






KH561 Datasheet, Funktion
DATA SHEET
SUMMARY DESIGN EQUATIONS AND DEFINITIONS
+VCC (+15)
KH561
Rf = (G + 1) Ro AvRi
Rg
=
Rf Ro
Av 1
Cx =
1
Ro 0.08
300
1
2
Rg
Rf Feedback resistor
from output to inverting
input
Rg Gain setting
resistor from inverting
input to ground
Cx External
compensation capacitor
from output to
pin 19 (in pF)
Where:
Ro Desired equivalent output impedance
Av Non-inverting input to output voltage
gain with no load
G Internal current gain from inverting input
to output = 10 ±1%
Ri Internal inverting input impedance = 14±%5
Rs Non-inverting input termination resistor
RL Load resistor
AL Voltage gain from non-inverting input to
load resistor
KH561 Description of Operation
Looking at the circuit of Figure 1 (the topology and
resistor values used in setting the data sheet specifica-
tions), the KH561 appears to bear a strong external
resemblance to a classical op amp. As shown in the
simplified block diagram of Figure 2, however, it differs in
several key areas. Principally, the error signal is a
current into the inverting input (current feedback) and the
forward gain from this current to the output is relatively
low, but very well controlled, current gain. The KH561
has been intentionally designed to have a low internal
gain and a current mode output in order that an equivalent
output impedance can be achieved without the series
matching resistor more commonly required of low output
impedance op amps. Many of the benefits of a high loop
gain have, however, been retained through a very careful
control of the KH561s internal characteristics.
The feedback and gain setting resistors determine both
the output impedance and the gain. Rf predominately
sets the output impedance (Ro), while Rg predominately
determines the no load gain (Av). solving for the required
Rf and Rg, given a desired Ro and Av, yields the design
equations shown below. Conversely, given an Rf and Rg,
the performance equations show that both Rf and Rg play
a part in setting Ro and Av. Independent Ro and Av
adjustment would be possible if the inverting input imped-
ance (Ri) were 0 but, with Ri = 14as shown in the
specification listing, independent gain and output imped-
ance setting is not directly possible.
+
6.8µF
.1µF
Cx
Vi
(Pi)
Rs
50
8
4 19
+
10.5pF
KH561 23
18 -
Ro
RL
Vo
(Po)
5,10,15,
50
21 20
Rf
410
Rg
Resistor Values
shown result in:
40Ro = 50
.1µF
+ 6.8µF Av = +10
(no-load gain)
-VCC (-15)
AL = +5 [14dB]
(gain to 50load)
Figure 1: Test Circuit
Design Equations
Rf = (G + 1) Ro AvRi
Rg
=
Rf Ro
Av 1
Ro
=
Rf
+
Ri
1+
Rf
Rg
G + 1+ Ri

Rg
Where:
G forward current gain
(=10)
Ri inverting node input
resistance (=14)
Ro desired output
impedance
Av desired non-
inverting voltage
gain with no load
Av
= 1+
Rf
Rg
G Ri
Rf
G
+
1+
Ri
Rg
Performance Equations
Simplified Circuit Description
Looking at the KH561s simplified schematic in Figure 2,
the amplifiers operation may be described. Going from
the non-inverting input at pin 8 to the inverting input at pin
18, transistors Q1 Q4 act as an open loop unity gain
buffer forcing the inverting node voltage to follow the non-
inverting voltage input.
Transistors Q3 and Q4 also act as a low impedance (14
looking into pin 18) path for the feedback error current.
This current, (ierr), flows through those transistors into a
very well defined current mirror having a gain of 10 from
this error current to the output. The current mirror outputs
act as the amplifier output.
The input stage bias currents are supply voltage inde-
pendent. Since these set the bias level for the whole
6 REV. 1A February 2001

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KH561 pdf, datenblatt
DATA SHEET
KH561
20°C/W
Tj(t)
Pt
200°C/W
Tj(q)
Pq
Case Temperature
Tc
θca
Case to Ambient
Termal Impedance
Pcircuit
TA
Ambient
Temperature
Figure 10: Thermal Model
Io = Vo / Req total output current
with Req = RL
Rf
AL
AL1
total
load
It
=
1
2
Io
+
Io2 + (.06)2 
total internal output stage current
Pt = It (VCC 1.4 17.3Ω ⋅It ) output stage power
Pq = 0.2 It (VCC Vo 0.7 15.3Ω ⋅It )
power in hottest internal junction
prior to output stage
( )Pcircuit = 1.3 VCC 2 It Io + 19.2mA Pt Pq
power in remainder of circuit [note VCC = | VCC |]
Note that the Pt and Pq equations are written for positive
Vo. Absolute values of -VCC, Vo, and Io, should be used
for a negative going Vo. since we are only interested in
delta Vs. For bipolar swings, the two powers for each
output polarity are developed as shown above then
ratioed by the duty cycle. Having the total internal power,
as well as its component parts, the maximum junction
temperature may be computed as follows.
Tc = TA + (Pq + PT + Pcircult) θca Case Temperature
θca = 35°C/W for the KH561 with no heatsink in still air
Tj(t) = Tc + Pt 20°C/W
output transistor junction temperature
Tj(q) = Tc + Pq 200°C/W
hottest internal junction temperature
The Limiting Factor for Output Power is Maximum
Junction Temperature
Reducing θca through either heatsinking and/or
airflow can greatly reduce the junction temperatures.
One effective means of heatsinking the KH561 is to use
a thermally conductive pad under the part from the pack-
age bottom to a top surface ground plane on the compo-
nent side. Tests have shown a θca of 24°C in still air using
a Sil Padavailable from Bergquist (800-347-4572).
As an example of calculating the maximum internal junc-
tion temperatures, consider the circuit of Figure 1 driving
±2.5V, 50% duty cycle, square wave into a 50load.
Note that 1/2 of the total PT and Pa powers were used
Req = 50
410Ω ⋅ 5
 5 1

=
45.6
Io = 2.5V / (45.6) = 54.9mA
IT
=
1
2

54.9mA
+
(54.9mA)2 + (.06)2  = 68.1mA
PT = 68.1mA [15 2.5 0.7 15.3Ω ⋅ 68.1mA] = 733mW
total power in both sides of the output stage
Pq = 0.2 68.1mA [15 1.4 17.3Ω ⋅ 68.1mA] = 169mW
total power in both sides of hottest junctions
prior to output stage
Pcircuit = 1.3 (15) [2 68.1mA 54.9mA + 19.2mA]
733mW 169mW = 1.058W
power in the remainder of circuit
With these powers and TA = 25°C and θca = 35°C / W
Tc = 25°C + (.733 + .169 + 1.058) 35 = 94°C
case temperature
From this, the hottest internal junctions may be found as
Tj
(t)
=
94°C
+
1
2
(.733)
20
=
101°C
output
stage
Tj(q)
=
94°C
+
1
2
(.169)
200
=
111°C
hottest internal junction
here since the 50% duty cycle output splits the power
evenly between the two halves of the circuit whereas the
total powers were used to get case temperature.
Even with the output current internally limited to 250mA,
the KH561s short circuiting capability is principally a
thermal issue. Generally, the KH561 can survive short
duration shorts to ground without any special effort. For
protection against shorts to the ±15 volt supply voltages,
it is very useful to reduce some of the voltage across the
output stage transistors by using some external output
resistance, Rx, as shown in Figure 9.
Evaluation Board
An evaluation board (part number 730019) for the KH561
is available.
12 REV. 1A February 2001

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