Datenblatt-pdf.com


74ACQ240 Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer 74ACQ240
Beschreibung Quiet Series. Octal Buffer/Line Driver with 3-STATE Outputs
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 10 Seiten
74ACQ240 Datasheet, Funktion
July 1989
Revised November 1999
74ACQ240 74ACTQ240
Quiet SeriesOctal Buffer/Line Driver
with 3-STATE Outputs
General Description
The ACQ/ACTQ240 is an inverting octal buffer and line
driver designed to be employed as a memory address
driver, clock driver and bus oriented transmitter or receiver
which provides improved PC board density. The ACQ/
ACTQ utilizes Fairchild’s Quiet Seriestechnology to
guarantee quiet output switching and improve dynamic
threshold performance. FACT Quiet Seriesfeatures
GTOoutput control and undershoot corrector in addition
to a split ground bus for superior performance.
Features
s ICC and IOZ reduced by 50%
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin skew AC performance
s Improved latch-up immunity
s Inverting 3-STATE outputs drive bus lines or buffer
memory address registers
s Outputs source/sink 24 mA
s Faster prop delays than the standard ACT240
Ordering Code:
Order Number Package Number
Package Description
74ACQ240SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC)JEDEC MS-013, 0.300Wide Body
74ACQ240SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACQ240PC
N20A
20-Lead Plastic Dwuwawl.-DIanta-LShineeet4PUa.ccomkage (PDIP), JEDEC MS-001, 0.300Wide
74ACTQ240SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC)JEDEC MS-013, 0.300Wide Body
74ACTQ240SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACTQ240QSC
MQA20
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150Wide
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
OE1, OE2
I0I7
O0O7
Description
3-STATE Output Enable Inputs
Inputs
Outputs
FACT, Quiet Series, FACT Quiet Series, and GTOare trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010234
www.fairchildsemi.com






74ACQ240 Datasheet, Funktion
FACT Noise Characteristics
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the
noise characteristics of FACT.
Equipment:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Tektronics Model 7854 Oscilloscope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50 pF,
500.
2. Deskew the HFS generator so that no two channels
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
3. Terminate all inputs and outputs to ensure proper load-
ing of the outputs and that the input levels are at the
correct voltage.
4. Set the HFS generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and affect the results of the measure-
ment.
5. Set the HFS generator input levels at 0V LOW and 3V
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with an oscilloscope.
VOLP/VOLV and VOHP/V OHV:
Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output volt-
ages using a 50coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
Measure VOLP and VOLV on the quiet output during the
worst case transition for active and enable. Measure
VOHP and VOHV on the quiet output during the worst
case active and enable transition.
Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
VILD and VIHD:
Monitor one of the switching outputs using a 50coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
First increase the input LOW voltage level, VIL, until the
output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds VIL limits, or on output HIGH levels that
exceed VIH limits. The input LOW voltage level at which
oscillation occurs is defined as VILD.
Next decrease the input HIGH voltage level, VIH, until
the output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds VIL limits, or on output HIGH levels that
exceed VIH limits. The input HIGH voltage level at which
oscillation occurs is defined as VIHD.
Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
Note 17: VOHV and VOLP are measured with respect to ground reference.
Note 18: Input pulses have the following characteristics: f = 1 MHz, tr =
3 ns, tf = 3 ns, skew < 150 ps.
FIGURE 1. Quiet Output Noise Voltage Waveforms
FIGURE 2. Simultaneous Switching Test Circuit
www.fairchildsemi.com
6

6 Page







SeitenGesamt 10 Seiten
PDF Download[ 74ACQ240 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
74ACQ240Quiet Series. Octal Buffer/Line Driver with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor
74ACQ241Octal Buffer/Line Driver with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor
74ACQ244Quiet Series. Octal Buffer/Line Driver with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor
74ACQ244Quiet Seres Octal Buffer/Line DriverNational Semiconductor
National Semiconductor
74ACQ245Quiet Series Octal Bidirectional Transceiver with 3-STATE Inputs/OutputsFairchild Semiconductor
Fairchild Semiconductor

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche