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Teilenummer | 74F113 |
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Beschreibung | Dual J-K negative edge-triggered flip-flops without reset | |
Hersteller | NXP Semiconductors | |
Logo | ||
Gesamt 10 Seiten INTEGRATED CIRCUITS
74F113
Dual J-K negative edge-triggered
flip-flops without reset
Product specification
IC15 Data Handbook
1991 Feb 14
Philips
Semiconductors
Philips Semiconductors
Dual J-K negative edge-triggered flip-flops
without reset
Product specification
74F113
TEST CIRCUIT AND WAVEFORMS
PULSE
GENERATOR
VIN
VCC
VOUT
D.U.T.
NEGATIVE
PULSE
90%
tw
VM
10%
tTHL (tf )
VM
10%
tTLH (tr )
90%
AMP (V)
0V
RT CL RL
Test Circuit for Totem-Pole Outputs
POSITIVE
PULSE
10%
tTLH (tr )
90%
VM
tw
tTHL (tf )
90%
VM
AMP (V)
10%
0V
DEFINITIONS:
RL = Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
Input Pulse Definition
family
74F
INPUT PULSE REQUIREMENTS
amplitude VM rep. rate
tw tTLH
3.0V 1.5V 1MHz 500ns 2.5ns
tTHL
2.5ns
SF00006
1996 Mar 14
6
6 Page | ||
Seiten | Gesamt 10 Seiten | |
PDF Download | [ 74F113 Schematic.PDF ] |
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