(PDF) 74F109 Datasheet - Positive J-K positive edge-triggered flip-flops

Número de pieza	74F109
Descripción	Positive J-K positive edge-triggered flip-flops
Fabricantes	NXP Semiconductors
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No Preview Available ! INTEGRATED CIRCUITS 74F109 Positive J-K positive edge-triggered flip-flops Product specification IC15 Data Handbook 1990 Oct 23 Philips Semiconductors 1 page Philips Semiconductors Postive J-K positive edge-triggered flip-flops AC WAVEFORMS For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. Jn, Kn CPn Qn Qn VM VM tsu(L) th(L) 1/fmax VM VM tw(H) tPLH VM tsu(H) tw(L) VM th(H) VM tPHL tPHL VM VM tPLH VM VM SF00139 Waveform 1. Propagation Delay for Data to Output, Data Setup Time and Hold Times, and Clock Width,and Maximum Clock Frequency SDn VM tw(L) VM RDn tPLH tw(L) VM tPHL VM Qn VM tPHL VM tPLH Qn VM VM SF00050 Waveform 2. Propagation Delay for Set and Reset to Output, Set and Reset Pulse Width SDn or RDn VM trec CPn VM SF00051 Waveform 3. Recovery Timer for Set or Reset to Clock Product specification 74F109 October 23, 1990 5 5 Page

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PDF 74F109 Data sheet ( Hoja de datos )