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Teilenummer | 74ALVCH32501 |
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Beschreibung | 36-bit universal bus transceiver with direction pin; 5 V tolerant; 3-state | |
Hersteller | NXP Semiconductors | |
Logo | ||
Gesamt 16 Seiten INTEGRATED CIRCUITS
DATA SHEET
74ALVCH32501
36-bit universal bus transceiver with
direction pin; 5 V tolerant; 3-state
Product specification
File under Integrated Circuits, IC24
2000 Mar 16
Philips Semiconductors
36-bit universal bus transceiver with direction pin;
5 V tolerant; 3-state
Product specification
74ALVCH32501
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC DC supply voltage
VI
VO
Tamb
tr, tf
DC input voltage
DC output voltage
ambient temperature
input rise and fall time ratios
(∆t/∆V)
CONDITIONS
MIN.
2.5 V range (for maximum speed 2.3
performance at 30 pF output load)
3.3 V range (for maximum speed 3.0
performance at 50 pF output load)
0
output HIGH or LOW state
0
−40
VCC = 1.2 to 2.7 V
VCC = 2.7 to 3.6 V
0
0
MAX.
2.7
3.6
VCC
VCC
+85
20
10
UNIT
V
V
V
V
°C
ns/V
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
CONDITIONS
VCC DC supply voltage
VI DC input voltage
for control pins; note 1
for data input pins; note 1
IIK
IOK
VO
IO
ICC, IGND
Tstg
PD
DC input diode current
VI < 0
DC output clamping diode current VO < 0; note 1
DC output voltage
see note 1
DC output sink current
VO = 0 to VCC
DC VCC or GND current
storage temperature
power dissipation per packages for temperature range:
−40 to +85 °C; note 2
MIN.
−0.5
−0.5
−0.5
−
−
−0.5
−
−
−65
−
MAX.
UNIT
+4.6 V
+4.6 V
VCC + 0.5 V
−50 mA
50 mA
VCC + 0.5 V
−50 mA
±100
mA
+150
°C
1 000
mW
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 55 °C the value of PD derates linearly with 1.8 mW/K.
2000 Mar 16
6
6 Page Philips Semiconductors
36-bit universal bus transceiver with direction pin;
5 V tolerant; 3-state
Product specification
74ALVCH32501
handbook, full pagewidth
PULSE
GENERATOR
VI
VCC
VO
D.U.T.
RT
S1
RL
500 Ω
2 × VCC
open
GND
CL
50 pF
RL
500 Ω
MNA479
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
open
2 × VCC
GND
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Z0 of the pulse generator.
Fig.8 Load circuitry for switching times.
2000 Mar 16
12
12 Page | ||
Seiten | Gesamt 16 Seiten | |
PDF Download | [ 74ALVCH32501 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
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