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74ALVC164245 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer 74ALVC164245
Beschreibung 16-bit dual supply translating transceiver
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 20 Seiten
74ALVC164245 Datasheet, Funktion
74ALVC164245
16-bit dual supply translating transceiver; 3-state
Rev. 8 — 15 March 2012
Product data sheet
1. General description
The 74ALVC164245 is a high-performance, low-power, low-voltage, Si-gate CMOS
device, superior to most advanced CMOS compatible TTL families.
The 74ALVC164245 is a 16-bit (dual octal) dual supply translating transceiver featuring
non-inverting 3-state bus compatible outputs in both send and receive directions. It is
designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply
environment.
This device can be used as two 8-bit transceivers or one 16-bit transceiver.
The direction control inputs (1DIR and 2DIR) determine the direction of the data flow.
nDIR (active HIGH) enables data from nAn ports to nBn ports. nDIR (active LOW) enables
data from nBn ports to nAn ports. The output enable inputs (1OE and 2OE), when HIGH,
disable both nAn and nBn ports by placing them in a high-impedance OFF-state. Pins
nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B).
In suspend mode, when one of the supply voltages is zero, there will be no current flow
from the non-zero supply towards the zero supply. The nAn-outputs must be set 3-state
and the voltage on the A-bus must be smaller than Vdiode (typical 0.7 V). VCC(B) VCC(A)
(except in suspend mode).
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range:
3 V port (VCC(A)): 1.5 V to 3.6 V
5 V port (VCC(B)): 1.5 V to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Control inputs voltage range from 2.7 V to 5.5 V
Inputs accept voltages up to 5.5 V
High-impedance outputs when VCC(A) or VCC(B) = 0 V
Complies with JEDEC standard JESD8-B/JESD36
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C and 40 C to +125 C






74ALVC164245 Datasheet, Funktion
NXP Semiconductors
74ALVC164245
16-bit dual supply translating transceiver; 3-state
5.2 Pin description
Table 2. Pin description
Symbol Pin
SOT370-1 and SOT362-1
1DIR, 2DIR 1, 24
1B0 to 1B7 2, 3, 5, 6, 8, 9, 11, 12
2B0 to 2B7 13, 14, 16, 17, 19, 20, 22, 23
GND
4, 10, 15, 21, 28, 34, 39, 45
VCC(B)
7, 18
1OE, 2OE 48, 25
1A0 to 1A7 47, 46, 44, 43, 41, 40, 38, 37
2A0 to 2A7 36, 35, 33, 32, 30, 29, 27, 26
VCC(A)
n.c.
31, 42
-
SOT1134-2
A30, A13
B20, A31, D5, D1, A2, B2, B3, A5
A6, B5, B6, A9, D2, D6, A12, B8
A32, A3, A8, A11, A16, A19, A24, A27
A1, A10,
A29, A14
B18, A28, D8, D4, A25, B16, B15, A22
A21, B13, B12, A18, D3, D7, A15, B10
A17, A26
A4, A7, A20, A23, B1, B4, B7, B9, B11,
B14, B17, B19
Description
direction control input
data input/output
data input/output
ground (0 V)
supply voltage B (5 V bus)
output enable input (active LOW)
data input/output
data input/output
supply voltage A (3 V bus)
not connected
6. Functional description
Table 3.
Inputs
nOE
L
L
H
Function table[1]
nDIR
L
H
X
Outputs
nAn
nAn = nBn
inputs
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
nBn
inputs
nBn = nAn
Z
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). See
[1].
Symbol
Parameter
Conditions
Min Max Unit
VCC(B)
VCC(A)
IIK
VI
VI/O
IOK
VO
supply voltage B
supply voltage A
input clamping current
input voltage
input/output voltage
output clamping current
output voltage
VCC(B) VCC(A)
VCC(B) VCC(A)
VI < 0 V
VO > VCC or VO < 0 V
output HIGH or LOW
output 3-state
0.5
0.5
50
[2] 0.5
0.5
-
[2] 0.5
[2] 0.5
+6.0
+4.6
-
+6.0
VCC + 0.5
50
VCC + 0.5
+6.0
V
V
mA
V
V
mA
V
V
IO(sink/source)
output sink or source
current
VO = 0 V to VCC
- 50 mA
ICC supply current
- 100 mA
74ALVC164245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 15 March 2012
© NXP B.V. 2012. All rights reserved.
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74ALVC164245 pdf, datenblatt
NXP Semiconductors
74ALVC164245
16-bit dual supply translating transceiver; 3-state
VI
nOE input
GND
VCC
output
LOW-to-OFF
OFF-to-LOW
VOL
VOH
output
HIGH-to-OFF
OFF-to-HIGH
GND
VM
tPLZ
tPZL
tPHZ
VX
VY
VM
tPZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
mna362
Fig 6.
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with output load.
3-state enable and disable times
Table 8. Measurement points
Direction
Supply voltage
nAn port to nBn
port
VCC(A)
VCC(B)
2.3 V to 2.7 V 2.7 V to 3.6 V
nBn port to nAn 2.3 V to 2.7 V 2.7 V to 3.6 V
port
nAn port to nBn 2.7 V to 3.6 V 4.5 V to 5.5 V
port
nBn port to nAn 2.7 V to 3.6 V 4.5 V to 5.5 V
port
Input
VI
VCC(A)
2.7 V
2.7 V
3.0 V
Output
VM VM
0.5 VCC(A) 1.5 V
VX
VOL(B) + 0.3 V
VY
VOH(B) 0.3 V
1.5 V
0.5 VCC(A) VOL(A) + 0.15 V VOH(A) 0.15 V
1.5 V
0.5 VCC(B) 0.2 VCC(B)
0.8 VCC(B)
1.5 V
1.5 V
VOL(A) + 0.3 V VOH(A) 0.3 V
74ALVC164245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 15 March 2012
© NXP B.V. 2012. All rights reserved.
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