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74AHC1G06 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer 74AHC1G06
Beschreibung Inverter with open-drain output
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 16 Seiten
74AHC1G06 Datasheet, Funktion
INTEGRATED CIRCUITS
DATA SHEET
74AHC1G06; 74AHCT1G06
Inverter with open-drain output
Product specification
File under Integrated Circuits, IC06
2000 May 01






74AHC1G06 Datasheet, Funktion
Philips Semiconductors
Inverter with open-drain output
Product specification
74AHC1G06;
74AHCT1G06
DC CHARACTERISTICS
74AHC1G family
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
Tamb (°C)
SYMBOL PARAMETER
OTHER
25 40 to +85 40 to +125 UNIT
VCC (V)
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VIH HIGH-level input
voltage
2.0 1.5 − − 1.5 1.5 V
3.0 2.1 − − 2.1 2.1 V
5.5 3.85 − − 3.85 3.85 V
VIL LOW-level input
voltage
2.0 − − 0.5 0.5 0.5 V
3.0 − − 0.9 0.9 0.9 V
5.5 − − 1.65 1.65 1.65 V
VOL
LOW-level output VI = VIH or VIL; 2.0
0
0.1 0.1 0.1 V
voltage
IO = 50 µA
3.0 0 0.1 0.1 0.1 V
4.5 0 0.1 0.1 0.1 V
VI = VIH or VIL;
IO = 4 mA
3.0
−−
0.36 0.44 0.55 V
VI = VIH or VIL;
IO = 8 mA
4.5
−−
0.36 0.44 0.55 V
II
input leakage
VI = VCC or GND 5.5
−−
0.1 1.0 2.0 µA
current
IOZ
3-state output
VI = VIH or VIL;
5.5
−−
±0.25 − ±2.5 − ±10.0 µA
OFF-state current VO = VCC or GND
ICC
quiescent supply VI = VCC or GND; 5.5
−−
1.0 10 20 µA
current
IO = 0
CI input capacitance
− − 1.5 10 10 10 pF
2000 May 01
6

6 Page









74AHC1G06 pdf, datenblatt
Philips Semiconductors
Inverter with open-drain output
Product specification
74AHC1G06;
74AHCT1G06
Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
BGA, LFBGA, SQFP, TFBGA
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
SOLDERING METHOD
WAVE
REFLOW(1)
not suitable
suitable
not suitable(2)
suitable
suitable
suitable
not recommended(3)(4) suitable
not recommended(5) suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2000 May 01
12

12 Page





SeitenGesamt 16 Seiten
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