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74ACTQ541 Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer 74ACTQ541
Beschreibung Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 7 Seiten
74ACTQ541 Datasheet, Funktion
March 1993
Revised November 1999
74ACTQ541
Quiet Series Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
The 74ACTQ541 is an octal buffer/line driver designed to
be employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers.
This device is similar in function to the 74ACTQ244 while
providing flow-through architecture (inputs on opposite side
from outputs). This pinout arrangement makes this device
especially useful as an output port for microprocessors,
allowing ease of layout and greater PC board density.
The 74ACTQ541 utilizes FACT Quiet Seriestechnology
to guarantee quiet output switching and improved dynamic
threshold performance. FACT Quiet Series features GTO
output control and undershoot corrector in addition to split
ground bus for superior performance.
Features
s ICC and IOZ reduced by 50%
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin skew AC performance
s Inputs and outputs on opposite sides of package for
easy board layout
s Non-inverting 3-STATE outputs
s Guaranteed 4 kV minimum ESD immunity
s TTL compatible inputs
s Outputs source/sink 24 mA
Ordering Code:
Order Number Package Number
Package Description
74ACTQ541SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ541MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACTQ541PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the order code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Truth Table
Pin Name
OE1 OE2
I0 I7
O1 O7
Pin Description
3-STATE Output Enable (Active-LOW)
Inputs
Outputs
OE1
L
H
X
L
H = HIGH Voltage Level
L = LOW Voltage Level
FACT, FACT Quiet Seriesand GTOare trademarks of Fairchild Semiconductor Corporation.
Inputs
OE2
I
LH
XX
HX
LL
X = Immaterial
Z = High Impedance
Outputs
H
Z
Z
L
© 1999 Fairchild Semiconductor Corporation DS010932
www.fairchildsemi.com






74ACTQ541 Datasheet, Funktion
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
www.fairchildsemi.com
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