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5429FCT2052ATQ Schematic ( PDF Datasheet ) - Integrated Device Technology

Teilenummer 5429FCT2052ATQ
Beschreibung FAST CMOS OCTAL REGISTERED TRANSCEIVERS
Hersteller Integrated Device Technology
Logo Integrated Device Technology Logo 




Gesamt 8 Seiten
5429FCT2052ATQ Datasheet, Funktion
Integrated Device Technology, Inc.
FAST CMOS
OCTAL REGISTERED
TRANSCEIVERS
IDT29FCT52AT/BT/CT/DT
IDT29FCT2052AT/BT/CT
IDT29FCT53AT/BT/CT
FEATURES:
• Common features:
– Low input and output leakage 1µA (max.)
– CMOS power levels
– True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
– Meets or exceeds JEDEC standard 18 specifications
– Product available in Radiation Tolerant and Radiation
Enhanced versions
– Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
– Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
• Features for 29FCT52/29FCT53T:
– A, B, C and D speed grades
– High drive outputs (-15mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
• Features for 29FCT2052T:
– A, B and C speed grades
– Resistor outputs (-15mA IOH, 12mA IOL Com.)
(-12mA IOH, 12mA IOL Mil.)
– Reduced system switching noise
FUNCTIONAL BLOCK DIAGRAM(1)
CPA
CEA
A0
A1
A2
A3
A4
A5
A6
A7
DESCRIPTION:
The IDT29FCT52AT/BT/CT/DT and IDT29FCT53AT/BT/
CT are 8-bit registered transceivers built using an advanced
dual metal CMOS technology. Two 8-bit back-to-back regis-
ters store data flowing in both directions between two bidirec-
tional buses. Separate clock, clock enable and 3-state output
enable signals are provided for each register. Both A outputs
and B outputs are guaranteed to sink 64mA.
The IDT29FCT52AT/BT/CT/DT and IDT29FCT2052AT/BT/
CT are non-inverting options of the IDT29FCT53AT/BT/CT.
The IDT29FCT2052AT/BT/CT has balanced drive outputs
with current limiting resistors. This offers low ground bounce,
minimal undershoot and controlled output fall times-reducing
the need for external series terminating resistors. The
IDT29FCT2052T part is a plug-in replacement for
IDT29FCT52T part.
D0 CE CP Q0
D1 Q1
D2 Q2
D3 A Q3
D4 Reg. Q4
D5 Q5
D6 Q6
D7 Q7
OEB
B0
B1
B2
B3
B4
B5
B6
B7
NOTE:
OEA
1. IDT29FCT52T/IDT29FCT2052T function is shown. IDT29FCT53T is
the inverting option.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
Q0 D0
Q1 D1
Q2 D2
Q3 B D3
Q4 Reg. D4
Q5 D5
Q6 D6
Q7 CE CP D7
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1995 Integrated Device Technology, Inc.
6.1
CPB
CEB
2629 drw 01
JUNE 1995
DSC-4224/5
1






5429FCT2052ATQ Datasheet, Funktion
IDT29FCT52AT/BT/CT/DT, IDT29FCT/2052AT/BT/CT, IDT29FCT53AT/BT/CT
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
29FCT52AT/53AT
29FCT52BT/53BT
29FCT2052AT
29FCT2052BT
Com'l. Mil. Com'l. Mil.
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tSU
tH
tSU
tH
tW
Parameter
Propagation Delay
CPA, CPB to An, Bn
Output Enable Time
OEA or OEB to An, Bn
Output Disable Time
OEA or OEB to An, Bn
Set-up Time, HIGH or LOW
An, Bn to CPA, CPB
Hold Time, HIGH or LOW
An, Bn to CPA, CPB
Set-up Time, HIGH or LOW
CEA, CEB to CPA, CPB
Hold Time, HIGH or LOW
CEA, CEB to CPA, CPB
Clock Pulse Width HIGH or
LOW(3)
Condition(1)
CL = 50pF
RL = 500
Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
2.0 10.0 2.0 11.0 2.0 7.5 2.0 8.0 ns
1.5 10.5 1.5 13.0 1.5 8.0 1.5 8.5 ns
1.5 10.0 1.5 10.0 1.5 7.5 1.5 8.0 ns
2.5 — 2.5 — 2.5 — 2.5 — ns
2.0 — 2.0 — 1.5 — 1.5 — ns
3.0 — 3.0 — 3.0 — 3.0 — ns
2.0 — 2.0 — 2.0 — 2.0 — ns
3.0 — 3.0 — 3.0 — 3.0 — ns
2629 tbl 10
29FCT52CT/53CT
29FCT2052CT
Com'l.
Mil.
Symbol
Parameter
Condition(1) Min.(2) Max. Min.(2) Max.
tPLH Propagation Delay
tPHL CPA, CPB to An, Bn
CL = 50pF
RL = 500
2.0 6.3 2.0 7.3
tPZH Output Enable Time
tPZL OEA or OEB to An, Bn
tPHZ Output Disable Time
tPLZ OEA or OEB to An, Bn
tSU Set-up Time, HIGH or LOW
An, Bn to CPA, CPB
1.5 7.0 1.5 8.0
1.5 6.5 1.5 7.5
2.5 — 2.5 —
tH Hold Time, HIGH or LOW
An, Bn to CPA, CPB
1.5 — 1.5 —
tSU Set-up Time, HIGH or LOW
CEA, CEB to CPA, CPB
tH Hold Time, HIGH or LOW
CEA, CEB to CPA, CPB
3.0 — 3.0 —
2.0 — 2.0 —
tW Clock Pulse Width HIGH or
LOW(3)
3.0 — 3.0 —
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
29FCT52DT
Com'l.
Mil.
Min.(2) Max. Min.(2) Max.
Unit
2.0 4.5 —
— ns
1.5 5.6 —
— ns
1.5 4.3 —
— ns
1.5 — — — ns
1.0 — — — ns
2.0 — — — ns
1.0 — — — ns
3.0 — — — ns
2629 tbl 11
6.1 6

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