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5962-9067802MXC Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer 5962-9067802MXC
Beschreibung High Performance Microprocessor with Memory Management and Protection
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 13 Seiten
5962-9067802MXC Datasheet, Funktion
80C286/883
March 1997
High Performance Microprocessor with Memory
Management and Protection
Features
Description
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Compatible with NMOS 80286/883
• Static CMOS Design for Low Power Operation
- ICCSB = 5mA Maximum
- ICCOP = 185mA Maximum (80C286-10/883)
- ICCOP = 220mA Maximum (80C286-12/883)
• Large Address Space
- 16 Megabytes Physical
- 1 Gigabyte Virtual per Task
• Integrated Memory Management, Four-Level Memory
Protection and Support for Virtual Memory and
Operating Systems
• Two 80C86 Upward Compatible Operating Modes
- 80C286/883 Real Address Mode
- Protected Virtual Address Mode
• Compatible with 80287 Numeric Data Co-Processor
The Intersil 80C286/883 is a static CMOS version of the
NMOS 80286 microprocessor. The 80C286/883 is an
advanced, high-performance microprocessor with specially
optimized capabilities for multiple user and multi-tasking sys-
tems. The 80C286/883 has built-in memory protection that
supports operating system and task isolation as well as pro-
gram and data privacy within tasks. The 80C286/883
includes memory management capabilities that map 230
(one gigabyte) of virtual address space per task into 224
bytes (16 megabytes) of physical memory.
The 80C286/883 is upwardly compatible with 80C86 and
80C88 software (the 80C286/883 instruction set is a super-
set of the 80C86/80C88 instruction set). Using the 80C286/
883 real address mode, the 80C286/883 is object code com-
patible with existing 80C86 and 80C88 software. In protected
virtual address mode, the 80C286/883 is source code com-
patible with 80C86 and 80C88 software but may require
upgrading to use virtual address as supported by the
80C286/883’s integrated memory management and protec-
tion mechanism. Both modes operate at full 80C286/883
performance and execute a superset of the 80C86 and
80C88 instructions.
The 80C286/883 provides special operations to support the
efficient implementation and execution of operating systems.
For example, one instruction can end execution of one task,
save its state, switch to a new task, load its state, and start
execution of the new task. The segment-not-present excep-
tion and restartable instructions.
Ordering Information
PACKAGE TEMP. RANGE
10MHz
12.5MHz
16MHz
68 Pin PGA 0oC to +70oC
-
CG80C286-12
CG80C286-16
-40oC to +85oC IG80C286-10
IG80C286-12
-
-55oC to +125oC MG80C286-10/883 MG80C286-12/883
-
5962-9067801MXC 5962-9067802MXC
-
20MHz
CG80C286-20
-
-
-
25MHz
-
-
-
-
PKG. NO.
G68.B
G68.B
G68.B
G68.B
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
3-128
File Number 2948.1






5962-9067802MXC Datasheet, Funktion
80C286/883
AC Electrical Specifications 82C284 and 82C288 Timing Specifications Are Given For Reference Only, And No Guarantee is
Implied.
82C284 Timing
SYMBOL
PARAMETER
10MHz
MIN MAX
12.5MHz
MIN MAX UNIT
TEST CONDITION
TIMING REQUIREMENTS
11 SRDY/SRDYEN Setup Time
15
-
15 - ns
12 SRDY/SRDYEN Hold Time
13 ARDY/ARDYEN Setup Time
2
5
-
-
2 - ns
5 - ns (Note 1)
14 ARDY/ARDYEN Hold Time
TIMING RESPONSES
30
-
25 - ns (Note 1)
19 PCLK Delay
0 20
0
NOTE:
1. These times are given for testing purposes to ensure a predetermined action.
16 ns CL = 75pF, IOL = 5mA,
IOH = -1mA
82C288 Timing
SYMBOL
PARAMETER
TIMING REQUIREMENTS
12 CMDLY Setup Time
13 CMDLY Hold Time
TIMING RESPONSES
16 ALE Active Delay
17 ALE Inactive Delay
19 DT/R Read Active Delay
20 DEN Read Active Delay
21 DEN Read Inactive Delay
22 DT/R Read Inactive Delay
23 DEN Write Active Delay
24 DEN Write Inactive Delay
29 Command Active Delay from CLK
30 Command Inactive Delay from CLK
10MHz
MIN MAX
12.5MHz
MIN MAX
UNIT TEST CONDITION
15 - 15 - ns
1 - 1 - ns
1 16 1 16 ns
- 19 - 19 ns
- 23 - 23 ns CL = 150pF
0 21 0 21 ns IOL = 16mA Max
3 23 3 21 ns IOH = -1mA Max
5 24 5 18 ns
- 23 - 23 ns
3 23 3 23 ns
3 21 3 21 ns CL = 300pF
3 20 3 20 ns IOL = 32mA Max
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6 Page









5962-9067802MXC pdf, datenblatt
Burn-In Circuit
80C286/883
NOTES:
8. Supply Voltage: VDD = 5.5V, VSS = 0.0V.
9. Input Voltage Limits: VIL (Maximum) = 0.8V, VIH (Minimum) = 2.0V
10. Component Values: RC = 1kΩ ±5%, RI = 10kΩ ±5%, RO = Two Series 2.7kΩ ±5%
11. Capacitor Values: C1 = 0.1 Microfarads
12. Oven Type and Frequency Requirements: Wakefield Oven Board f0 = 100kHz, f3 = 12.5kHz,
f4 = 6.25kHz, f5 = 3.125kHz, f7 = 781.25Hz.
13. Special Requirements: (a) ELECTROSTATIC DISCHARGE SENSITIVE. Proper Precautions Must be Used When Handling Units. (b) All Power Supplies
Must be at Zero Volts When the Boards are Inserted into the Ovens. (c) When Powering Up, the Inputs Must be Held Below the VDD Voltage. (d) If an
Excessive Current is Indicated at Final Inspection, Check to See if a Part is Inserted Backwards or is Latched Up.
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