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DM74ALS245A Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer DM74ALS245A
Beschreibung Octal 3-STATE Bus Transceiver
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 6 Seiten
DM74ALS245A Datasheet, Funktion
September 1986
Revised February 2000
DM74ALS245A
Octal 3-STATE Bus Transceiver
General Description
This advanced low power Schottky device contains 8 pairs
of 3-STATE logic elements configured as octal bus trans-
ceivers. These circuits are designed for use in memory,
microprocessor systems and in asynchronous bidirectional
data buses. Two way communication between buses is
controlled by the (DIR) input. Data transmits either from the
A bus to the B bus or from the B bus to the A bus. Both the
driver and receiver outputs can be disabled via the (G)
enable input which causes outputs to enter the high imped-
ance mode so that the buses are effectively isolated.
Features
s Advanced oxide-isolated, ion-implanted Schottky TTL
process
s Non-inverting logic output
s Glitch free bus during power up and down
s 3-STATE outputs independently controlled on A and B
buses
s Low output impedance to drive terminated transmission
lines to 133
s Switching response specified into 500/50 pF
s Specified to interface with CMOS at VOH = VCC 2V
s PNP inputs to reduce input loading
s Switching specifications guaranteed over full tempera-
ture and VCC range
Ordering Code:
Order Number Package Number
Package Description
DM74ALS245AWM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS245ASJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS245AMSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS245AN
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Control
Inputs
G DIR
LL
LH
HX
H = HIGH Logic Level
L = LOW Logic Level
X = Either HIGH or LOW Logic Level
Operation
B Data to A Bus
A Data to B Bus
Hi-Z
© 2000 Fairchild Semiconductor Corporation DS006213
www.fairchildsemi.com






DM74ALS245A Datasheet, Funktion
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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