Datenblatt-pdf.com


FQD3P50 Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer FQD3P50
Beschreibung 500V P-Channel MOSFET
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 9 Seiten
FQD3P50 Datasheet, Funktion
FQD3P50 / FQU3P50
500V P-Channel MOSFET
January 2009
QFET®
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on complimentary
half bridge.
D
GS
D-PAK
FQD Series
GDS
Features
• -2.1A, -500V, RDS(on) = 4.9@VGS = -10 V
• Low gate charge ( typical 18 nC)
• Low Crss ( typical 9.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
• RoHS Compliant
I-PAK
FQU Series
G!
S
!
▶▲
!
D
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
(Note 3)
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2009 Fairchild Semiconductor Internati
FQD3P50 / FQU3P50
-500
-2.1
-1.33
-8.4
± 30
250
-2.1
5.0
-4.5
2.5
50
0.4
-55 to +150
300
Typ Max
-- 2.5
-- 50
-- 110
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
Rev. A2, January 2009






FQD3P50 Datasheet, Funktion
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
I SD
Driver
RG
VGS
+
VDS
_
L
Compliment of DUT
(N-Channel)
• dv/dt controlled by RG
• ISD controlled by pulse period
VDD
VGS
( Driver )
I SD
( DUT )
VDS
( DUT )
D = --GG--aa--tt-ee--P-P-u-u-ll-ss-ee---PW--e-i-dr-ito-h-d-
10V
Body Diode Reverse Current
IRM
IFM , Body Diode Forward Current
VSD
di/dt
Body Diode
Forward Voltage Drop
Body Diode Recovery dv/dt
VDD
©2009 Fairchild Semiconductor International
Rev. A2, January 2009

6 Page







SeitenGesamt 9 Seiten
PDF Download[ FQD3P50 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
FQD3P50500V P-Channel MOSFETFairchild Semiconductor
Fairchild Semiconductor
FQD3P50TM_F085500V P-Channel MOSFETFairchild Semiconductor
Fairchild Semiconductor

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche