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FOD2200V Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer FOD2200V
Beschreibung LOW INPUT CURRENT LOGIC GATE OPTOCOUPLERS
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 14 Seiten
FOD2200V Datasheet, Funktion
LOW INPUT CURRENT
LOGIC GATE OPTOCOUPLERS
FOD2200
DESCRIPTION
The FOD2200 is an optically coupled logic gate that combine an AlGaAs LED
and an integrated high gain photo detector. The detector has a three state
output stage and has a detector threshold with hysteresis. The three state
output eliminates the need for a pullup resistor and allows for direct drive of
data busses. The hysteresis provides differential mode noise immunity and
eliminates the potential for output signal chatter.
The Electrical and Switching Characteristics of the FOD2200 are guaranteed
over the temperature range of 0°C to 85°C and a VCC range of 4.5 volts to 20
volts. Low IF and wide VCC range allow compatibility with TTL, LSTTL, and
CMOS logic and result in lower power consumption compared to other high
speed optocouplers. Logic signals are transmitted with a maximum propaga-
tion delay of 300 nsec. The FOD2200 is useful for isolating high speed logic
interfaces, buffering of input and output lines, and implementing isolated line
receivers in high noise environments.
8
1
8
1
8
1
FEATURES
• 1 kV/µs Minimum Common Mode
Rejection
• Compatible with LSTTL, TTL, and CMOS
Logic
• Wide VCC Range (4.5 to 20 V)
• 2.5 Mbd Guaranteed over Temperature
• Low Input Current (1.6 mA)
• Three State Output (No Pullup Resistor
Required)
• Guaranteed Performance from 0°C to 85°C
• Hysteresis
• Safety Approvals Pending – UL, CSA, VDE
• VISO = 5kVRMS
APPLICATION
• Isolation of High Speed Logic Systems
• Computer-Peripheral Interfaces
• Microprocessor System Interfaces
• Ground Loop Elimination
• Pulse Transformer Replacement
• Isolated Buss Driver
• High Speed Line Receiver
NC 1
ANODE 2
CATHODE 3
NC 4
Schematic
IF
+
2
VF
3
SHIELD
SHIELD
8 VCC
7 VO
6 VE
5 GND
ICC
VCC
8
IO
7 VO
IE
6 VE
GND
5
TRUTH TABLE (Positive Logic)
LED
On
Off
On
Off
Enable
H
H
L
L
© 2004 Fairchild Semiconductor Corporation
Page 1 of 14
Output
Z
Z
H
L
7/7/04






FOD2200V Datasheet, Funktion
LOW INPUT CURRENT
LOGIC GATE OPTOCOUPLERS
PULSE GEN.
tr = tf = 5 ns
f = 100 kHz
10 % DUTY
CYCLE
VO = 5 V
INPUT
MONITORING
NODE
IF
1
2
3
R1 C1 = 4
120 pF
FOD2200
VCC 8
7
6
GND 5
VCC
OUTPUT VO
MONITORING
NODE
5V
D1 619
C2 =
15 pF
5 k
D2
D3
D4
INPUT IF
THE PROBE AND JIG CAPACITANCES
ARE INCLUDED IN C1 AND C2.
RI 2.15 k1.10 k681
IF (ON) 1.6 mA 3 mA 5 mA
ALL DIODES ARE 1N916 OR 1N3064.
IF (ON)
50 % IF (ON)
0 mA
OUTPUT
VO
tPLH tPHL
VOH
1.3 V
VOL
Fig. 1. Test Circuit and Waveforms for tPLH, tPHL, tr and tf.
PULSE
GENERATOR
ZO = 50
tr = tf = 5 ns
CL= 15 pF INCLUDING PROBE
AND JIG CAPACITANCES.
VCC
FOD2200
VO
+5 V
S1
1 VCC 8
IF 2
7
D1 619
INPUT VC
MONITORING
NODE
3
4
6
GND 5
CL
5 k
D2
D3
D4
S2
D1-4 ARE 1N916 OR 1N3064.
INPUT
VE
tPZL
tPLZ
OUTPUT
VO
OUTPUT
VO
S1 CLOSED
S2 OPEN
tPZH
S1 OPEN
S2 CLOSED
1.3 V 0.5 V
0.5 V
1.3 V
0V
tPHZ
3.0 V
1.3 V
0V
S1 AND
S2 CLOSED
VOL
VOH
1.5 V
S1 AND
S2 CLOSED
Fig. 2. Test Circuit and Waveforms for tPHZ, tPZH, tPLZ, and tPZL
© 2004 Fairchild Semiconductor Corporation
Page 6 of 14
FOD2200
7/7/04

6 Page









FOD2200V pdf, datenblatt
ORDERING INFORMATION
Example: FOD2200
X
X
Packaging Option
S: Surface Mount Lead Bend
SD: Surface Mount, Tape and Reel
T: 0.4" Lead Spacing
V: VDE 0884
TV: VDE 0884, 0.4" Lead Spacing
SV: VDE 0884, Surface Mount
SDV: VDE 0884, Surface Mount, Tape and Reel
MARKING INFORMATION
LOW INPUT CURRENT
LOGIC GATE OPTOCOUPLERS
FOD2200
2200
V XX YY B
1
2
6
34
5
Definitions
1 Fairchild logo
2 Device number
3
VDE mark (Note: Only appears on parts ordered with VDE
option – See order entry table)
4 Two digit year code, e.g., ‘03’
5 Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
© 2004 Fairchild Semiconductor Corporation
Page 12 of 14
7/7/04

12 Page





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