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M27128A-3F6 Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer M27128A-3F6
Beschreibung NMOS 128K 16K x 8 UV EPROM
Hersteller STMicroelectronics
Logo STMicroelectronics Logo 




Gesamt 10 Seiten
M27128A-3F6 Datasheet, Funktion
M27128A
NMOS 128K (16K x 8) UV EPROM
FAST ACCESS TIME: 200ns
EXTENDED TEMPERATURE RANGE
SINGLE 5 V SUPPLY VOLTAGE
LOW STANDBY CURRENT: 40mA max
TTL COMPATIBLE DURING READ and
PROGRAM
FAST PROGRAMMING ALGORITHM
ELECTRONIC SIGNATURE
PROGRAMMING VOLTAGE: 12V
28
1
FDIP28W (F)
DESCRIPTION
The M27128A is a 131,072 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 16,384 words by 8 bits.
The M27128A is housed in a 28 Pin Window Ce-
ramic Frit-Seal Dual-in-Line package. The trans-
parent lid allows the user to expose the chip to
ultraviolet light to erase the bit pattern. A new
pattern can then be written to the device by follow-
ing the programming procedure.
Figure 1. Logic Diagram
VCC VPP
14
A0-A13
8
Q0-Q7
Table 1. Signal Names
A0 - A13
Q0 - Q7
E
G
P
VPP
VCC
VSS
Address Inputs
Data Outputs
Chip Enable
Output Enable
Program
Program Supply
Supply Voltage
Ground
P M27128A
E
G
VSS
AI00769B
March 1995
1/10






M27128A-3F6 Datasheet, Funktion
M27128A
Table 8. Programming Mode DC Characteristics (1)
(TA = 25 °C; VCC = 6V ± 0.25V; VPP = 12.5V ± 0.3V)
Symbol
Parameter
Test Condition
Min
Max
ILI Input Leakage Current
VIL VIN VIH
±10
ICC Supply Current
100
IPP Program Current
E = VIL
50
VIL Input Low Voltage
–0.1 0.8
VIH Input High Voltage
2 VCC + 1
VOL Output Low Voltage
IOL = 2.1mA
0.45
VOH Output High Voltage
IOH = –400µA
2.4
VID A9 Voltage
11.5
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
12.5
Unit
µA
mA
mA
V
V
V
V
V
Table 9. Programming Mode AC Characteristics (1)
(TA = 25 °C; VCC = 6V ± 0.25V; VPP = 12.5V ± 0.3V)
Symbol Alt
Parameter
Test Condition
Min Max Unit
tAVPL
tAS Address Valid to Program Low
2 µs
tQVPL
tDS Input Valid to Program Low
2 µs
tVPHPL
tVPS VPP High to Program Low
2 µs
tVCHPL
tVCS VCC High to Program Low
2 µs
tELPL
tCES
Chip Enable Low to Program
Low
2 µs
tPLPH
tPW Program Pulse Width (Initial)
Note 2
0.95 1.05
ms
tPLPH
tOPW
Program Pulse Width
(Overprogram)
Note 3
2.85 78.75
ms
tPHQX
tDH
Program High to Input
Transition
2 µs
tQXGL
tOES
Input Transition to Output
Enable Low
2 µs
tGLQV
tOE
Output Enable Low to
Output Valid
150 ns
tGHQZ (4)
tDFP
Output Enable High to
Output Hi-Z
0 130 ns
tGHAX
tAH
Output Enable High to
Address Transition
0 ns
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. The Initial Program Pulse width tolerance is 1 ms ± 5%.
3. The length of the Over-program Pulse varies from 2.85 ms to 78.95 ms, depending on the multiplication value of the iteration counter.
4. Sampled only, not 100% tested.
6/10

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