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PDF AU5780 Data sheet ( Hoja de datos )
| Número de pieza | AU5780 | |
| Descripción | SAE/J1850/VPW transceiver | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
AU5780A
SAE/J1850/VPW transceiver
Product data
Supersedes data of 1999 Jan 28
2001 Jun 19
Philips
Semiconductors
1 page  
Philips Semiconductors
SAE/J1850/VPW transceiver
Product data
AU5780A
CONTROL INPUT SUMMARY
TX /LB
MODE
BIT VALUE
BUS_OUT
RX
(out)
0 0 Loop-back
TX passive (default state)
float float (high)
1 0 Loop-back
TX active
float low
0 1 Communication
Transmitter passive
float bus state1
1 1 Communication
Transmitter active
high low
NOTE:
1. RX outputs the bus state. If the bus level is below the receiver threshold (i.e., all transmitters passive), then RX will be floating (i.e., high,
considering external pull-up resistance). Otherwise, if the bus level is above the receiver threshold (i.e., at least one transmitter is active),
then RX will be low.
ABSOLUTE MAXIMUM RATINGS
According to the IEC 134 Absolute Maximum System; operation is not guaranteed under these conditions; all voltages are referenced to pin 8
(GND); positive currents flow into the IC; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VBATT
VBATT.ld
VBATT.tr1
VBATT.tr2
VBATT.tr3
VB
VB.tr1
VB.tr2
VB.tr3
VI
ESDBATT
supply voltage
short-term supply voltage
transient supply voltage
transient supply voltage
transient supply voltage
Bus voltage
transient bus voltage
transient bus voltage
transient bus voltage
DC voltage on pins TX, R/F, RX, /LB
ESD capability of BATT pin
load dump; t < 1s
SAE J1113 pulse 1
SAE J1113 pulses 2
SAE J1113 pulses 3A, 3B
Rf > 10 kΩ ; Rb >10Ω 1
SAE J1113 pulse 1
SAE J1113 pulses 2
SAE J1113 pulses 3A, 3B
Air gap discharge,
R=2kΩ, C=150pF
–20
–100
–200
–20
–50
–200
–0.3
–9
+24
+50
+150
+200
+20
+100
+200
7
+9
V
V
V
V
V
V
V
V
V
V
kV
ESDbus
ESD capability of BUS_OUT and BUS_IN pins Air gap discharge,
–9 +9 kV
R=2kΩ, C=150pF, Rf > 10 kW
ESDlogic
ESD capability of TX, RX, R/F, and /LB pins
Human Body,
R=1.5kΩ, C=100pF
–2 +2 kV
Ptot maximum power dissipation
at Tamb = +125 °C
164
ΘJA thermal impedance
152
Tamb
operating ambient temperature
–40 +125
Tstg storage temperature
–40 +150
Tvj junction temperature
–40 +150
TLEAD
Lead temperature
Soldering, 10 seconds maximum
265
ICL(BUS)
Bus output clamp current
No latch-up, |VBUS| = 25 V
100
ICL(BATT)
Battery clamp current
No latch-up or snap back,
|VBATT| = 25 V
100
NOTE:
1. For bus voltages –20V < Vbus < –17V and +17V < Vbus < +20V the current is limited by the external resistors Rb and Rf.
mW
°C/W
°C
°C
°C
°C
mA
mA
2001 Jun 19
5
5 Page 
Philips Semiconductors
SAE/J1850/VPW transceiver
SO8: plastic small outline package; 8 leads; body width 3.9 mm
Product data
AU5780A
SOT96-1
2001 Jun 19
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AU5780.PDF ] | |
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