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PDF DS92LV222A Data sheet ( Hoja de datos )
| Número de pieza | DS92LV222A | |
| Descripción | Two Channel Bus LVDS MUXed Repeater | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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May 1998
DS92LV222A
Two Channel Bus LVDS MUXed Repeater
General Description
The DS92LV222A is a repeater designed specifically for the
bridging of multiple backplanes in a rack. The DS92LV222A
utilizes low voltage differential signaling to deliver high speed
while consuming minimal power with reduced EMI. The
RSEL pin and DE pins allow maximum flexibility as to which
receiver/driver are used. The DS92LV222A repeats signals
between backplanes and accepts or drives signals onto the
local bus. It also features a flow through pin out which allows
easy PCB routing for short stubs between its pins and the
connector.
The driver is selectable between 3.5 mA (100Ω load) and 8.5
mA (27Ω load) output loop currents depending upon the
level applied to the ISEL pin. This allows for single termina-
tion (point-to-point) and also double termination (multipoint)
applications while maintain similar differential levels.
The receiver threshold is ±100 mV, while providing ±1V
common mode range.
Features
n Bus LVDS Signaling (BLVDS)
n Designed for Double Termination Applications
n Low power CMOS design
n High Signaling Rate Capability (above 100 Mbps)
n Ultra Low Power Dissipation (13.2 mW quiescent)
n Balanced Output Impedance
n Lite Bus Loading 5 pF typical
n Selectable Drive Capability (3.5 mA or 8.5 mA)
n 3.3V operation
n ±1V Common Mode Range
n ±100 mV Receiver Sensitivity
n Available in 16 pin SOIC package.
Connection Diagram
Block Diagram
DS100055-1
Order Number DS92LV222ATM
See NS Package Number M16A
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS100055
DS100055-2
www.national.com
1 page  
Test Circuits and Timing Waveforms (Continued)
FIGURE 5. Driver TRI-STATE Delay Waveforms
DS100055-7
FIGURE 6. Receiver Select to Driver Propagation Delay Test Circuit
DS100055-8
FIGURE 7. Receiver Select to Driver Propagation Delay Waveforms
Pin Description
Pin Name
RI±
DO±
RSEL
DE
ISEL
GND
VCC
Reserved
Number
of Pins
4
4
1
2
2
1
1
1
Input/
Output
I
O
I
I
I
NA
NA
NA
Description
Bus LVDS Receiver Inputs
Bus LVDS Driver Outputs
Receiver Select TTL Input, (see Truth Tables)
Driver Enable TTL Input, Active High
IOL Control Pin (Select High = 3.5 mA (100Ω Load),
Select Low = 8.5mA (27Ω Load))
Ground Reference
Power Supply
Reserved Pin
DS100055-9
5 www.national.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet DS92LV222A.PDF ] | |
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