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PDF DS80C320-ENG Data sheet ( Hoja de datos )

Número de pieza DS80C320-ENG
Descripción High-Speed/Low-Power Micro
Fabricantes Dallas Semiconducotr 
Logotipo Dallas Semiconducotr Logotipo



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No Preview Available ! DS80C320-ENG Hoja de datos, Descripción, Manual

www.maxim-ic.com
DS80C320/DS80C323
High-Speed/Low-Power Micro
FEATURES
§ 80C32-Compatible
- 8051 pin and instruction set compatible
- Four 8-bit I/O ports
- Three 16-bit timer/counters
- 256 bytes scratchpad RAM
- Addresses 64 kB ROM and 64 kB RAM
§ High-speed architecture
- 4 clocks/machine cycle (8032=12)
- DC to 33 MHz (DS80C320)
- DC to 18 MHz (DS80C323)
- Single-cycle instruction in 121 ns
- Uses less power for equivalent work
- Dual data pointer
- Optional variable length MOVX to access
fast/slow RAM/peripherals
§ High integration controller includes:
- Power- fail reset
- Programmable watchdog timer
- Early- warning power- fail interrupt
§ Two full-duplex hardware serial ports
§ 13 total interrupt sources with six external
§ Available in 40-pin DIP, 44-pin PLCC and
TQFP
PIN ASSIGNMENT
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple
revisions of any device may be simultaneously available through various sales channels. For information about device errata,
click here: http://www.maxim-ic.com/errata.
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DS80C320-ENG pdf
DIP
21
22
23
24
25
26
27
28
10-17
10
11
12
13
14
15
16
17
31
-
-
PLCC
24
25
26
27
28
29
30
31
11,
13-19
11
13
14
15
16
17
18
19
35
12
34
1
TQFP
18
19
20
21
22
23
24
25
5, 7-13
5
7
8
9
10
11
12
13
29
6
28
39
SIGNAL NAME
A8 (P2.0)
A9 (P2.1)
A10 (P2.2)
A11 (P2.3)
A12 (P2.4)
A13 (P2.5)
A14 (P2.6)
A15 (P2.7)
P3.0-P3.7
EA
NC
DS80C320/DS80C323
DESCRIPTION
A15-A8 (Port 2) - Output. Port 2 serves as the MSB for external
addressing. P2.7 is A15 and P2.0 is A8. The device will
automatically place the MSB of an address on P2 for external ROM
and RAM access. Although Port 2 can be accessed like an ordinary
I/O port, the value stored on the Port 2 latch will never be seen on the
pins (due to memory access). Therefore writing to Port 2 in software
is only useful for the instructions MOVX A, @Ri or MOVX @Ri, A.
These instructions use the Port 2 internal latch to supply the external
address MSB. In this case, the Port 2 latch value will be supplied as
the address information.
Port 3 - I/O. Port 3 functions as both an 8-bit bi-directional I/O port
and an alternate functional interface for External Interrupts, Serial
Port 0, Timer 0 & 1 Inputs, RD and WR strobes. The reset condition
of Port 3 is with all bits at a logic 1. In this state, a weak pullup holds
the port high. This condition also serves as an input mode, since any
external circuit that writes to the port will overcome the weak pullup.
When software writes a 0 to any port pin, the device will activate a
strong pulldown that remains on until either a 1 is written or a reset
occurs. Writing a 1 after the port has been at 0 will cause a strong
transition driver to turn on, followed by a weaker sustaining pullup.
Once the momentary strong driver turns off, the port once again
becomes both the output high and input state. The alternate modes of
Port 3 are outlined below:
Port Alternate Mode
P3.0 RXD0 Serial Port 0 Input
P3.1 TXD0
Serial Port 0 Output
P3.2
INT0
External Interrupt 0
P3.3
INT1
P3.4 T0
P3.5 T1
External Interrupt 1
Timer 0 External Input
Timer 1 External Input
P3.6 WR
External Data Memory Write Strobe
P3.7
RD
External Data Memory Read Strobe
EA - Input. This pin must be connected to ground for proper
operation.
NC - Reserved. These pins should not be connected. They are
reserved for use with future devices in this family.
NC - Reserved. These pins are reserved for additional ground pins
on future products.
80C32 COMPATIBILITY
The DS80C320/DS80C323 is a CMOS 80C32-compatible microcontroller designed for high
performance. In most cases it will drop into an existing 80C32 design to significantly improve the
operation. Every effort has been made to keep the device familiar to 8032 users, yet it has many new
features. In general, software written for existing 80C32-based systems will work on the
DS80C320/DS80C323. The exception is critical timing since the High-Speed Microcontroller performs
its instructions much faster than the original. It may be necessary to use memories with faster access
times if the same crystal frequency is used.
Application note 57 “DS80C320 Memory Interface Timing” is a useful tool to help the embedded system
designer select the proper memories for her or his application.
The DS80C320/DS80C323 runs the standard 8051 instruction set and is pin-compatible with an 80C32 in
any of three standard packages. It also provides the same timer/counter resources, full-duplex serial port,
256 bytes of scratchpad RAM and I/O ports as the standard 80C32. Timers will default to a 12 clock per
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DS80C320-ENG arduino
DS80C320/DS80C323
On reset, the Stretch value will default to a 1, resulting in a three-cycle MOVX. Therefore, RAM access
will not be performed at full speed. This is a convenience to existing designs that may not have fast RAM
in place. When maximum speed is desired, the software should select a Stretch value of 0. When using
very slow RAM or peripherals, a larger stretch value can be selected. Note that this affects data memory
only and the only way to slow program memory (ROM) access is to use a slower crystal.
Using a Stretch value between 1 and 7 causes the microcontroller to stretch the read/write strobe and all
related timing. This results in a wider read/write strobe allowing more time for memory/peripherals to
respond. The timing of the variable speed MOVX is shown in the Electrical Specifications. Note that full
speed access is not the reset default case. Table 3 below shows the resulting strobe widths for each
Stretch value. The memory stretch is implemented using the Clock Control Special Function Register at
SFR location 8Eh. The stretch value is selected using bits CKCON.2-0. In the table, these bits are referred
to as M2 through M0. The first stretch (default) allows the use of common 120 ns or 150 ns RAMs
without dramatically lengthening the memory access.
DATA MEMORY CYCLE STRETCH VALUES Table 3
CKCON.2-0
MD2 MD1 MD0
000
001
010
011
100
101
110
111
MEMORY
CYCLES
2
3 (default)
4
5
6
7
8
9
RD or WR STROBE
WIDTH IN CLOCKS
2
4
8
12
16
20
24
28
STROBE WIDTH
TIME @ 25 MHz
80 ns
160 ns
320 ns
480 ns
640 ns
800 ns
960 ns
1120 ns
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