Datenblatt-pdf.com


DS80C320-ECL Schematic ( PDF Datasheet ) - Dallas Semiconducotr

Teilenummer DS80C320-ECL
Beschreibung High-Speed/Low-Power Micro
Hersteller Dallas Semiconducotr
Logo Dallas Semiconducotr Logo 




Gesamt 42 Seiten
DS80C320-ECL Datasheet, Funktion
www.maxim-ic.com
DS80C320/DS80C323
High-Speed/Low-Power Micro
FEATURES
§ 80C32-Compatible
- 8051 pin and instruction set compatible
- Four 8-bit I/O ports
- Three 16-bit timer/counters
- 256 bytes scratchpad RAM
- Addresses 64 kB ROM and 64 kB RAM
§ High-speed architecture
- 4 clocks/machine cycle (8032=12)
- DC to 33 MHz (DS80C320)
- DC to 18 MHz (DS80C323)
- Single-cycle instruction in 121 ns
- Uses less power for equivalent work
- Dual data pointer
- Optional variable length MOVX to access
fast/slow RAM/peripherals
§ High integration controller includes:
- Power- fail reset
- Programmable watchdog timer
- Early- warning power- fail interrupt
§ Two full-duplex hardware serial ports
§ 13 total interrupt sources with six external
§ Available in 40-pin DIP, 44-pin PLCC and
TQFP
PIN ASSIGNMENT
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple
revisions of any device may be simultaneously available through various sales channels. For information about device errata,
click here: http://www.maxim-ic.com/errata.
1 of 42
112299






DS80C320-ECL Datasheet, Funktion
DS80C320/DS80C323
cycle operation to keep timing compatible with original 8051 systems. However, they can be programmed
to run at the new 4 clocks per cycle if desired.
New hardware features are accessed using Special Func tion Registers that do not overlap with standard
80C32 locations. A summary of these SFRs is provided below.
The DS80C320/DS80C323 addresses memory in an identical fashion to the standard 80C32. Electrical
timing will appear different due to the high-speed nature of the product. However, the signals are
essentially the same. Detailed timing diagrams are provided below in the electrical specifications.
This data sheet assumes the user is familiar with the basic features of the standard 80C32. In addition to
these standard features, the DS80C320/DS80C323 includes many new functions. This data sheet provides
only a summary and overview. Detailed descriptions are available in the User’s Guide located in the front
of the High-Speed Microcontroller data book.
COMPARATIVE TIMING OF THE DS80C320/DS80C323 AND 80C32 Figure 2
DS80C320/DS80C323 TIMING
STANDARD 80C32 TIMING
6 of 42

6 Page









DS80C320-ECL pdf, datenblatt
DS80C320/DS80C323
DUAL DATA POINTER
Data memory block moves can be accelerated using the Dual Data Pointer (DPTR). The standard 8032
DPTR is a 16-bit value that is used to address off-chip data RAM or peripherals. In the
DS80C320/DS80C323, the standard 16-bit data pointer is called DPTR0 and is located at SFR addresses
82h and 83h. These are the standard locations. The new DPTR is located at SFR 84h and 85h and is
called DPTR1. The DPTR Select bit (DPS) chooses the active pointer and is located at the LSB of the
SFR location 86h. No other bits in register 86h have any effect and are set to 0. The user switches
between data pointers by toggling the LSB of register 86h. The increment (INC) instruction is the fastest
way to accomplish this. All DPTR-related instructions use the currently selected DPTR for any activity.
Therefore only one instruction is required to switch from a source to a destination address. Using the
Dual-Data Pointer saves code from needing to save source and destination addresses when doing a block
move. Once loaded, the software simply switches between DPTR and 1. The relevant register locations
are as follows.
DPL
DPH
DPL1
DPH1
DPS
82h Low byte original DPTR
83h High byte original DPTR
84h Low byte new DPTR
85h High byte new DPTR
86h DPTR Select (LSB)
Sample code listed below illustrates the saving from using the dual DPTR. The example program was
original code written for an 8051 and requires a total of 1869 DS80C320/DS80C323 machine cycles. This
takes 299 µs to execute at 25 MHz. The new code using the Dual DPTR requires only 1097 machine
cycles taking 175.5 µs. The Dual DPTR saves 772 machine cycles or 123.5 µs for a 64-byte block move.
Since each pass through the loop saves 12 machine cycles when compared to the single DPTR approach,
larger blocks gain more efficiency using this feature.
64-BYTE BLOCK MOVE WITHOUT DUAL DATA POINTER
; SH and SL are high and low byte source address.
; DH and DL are high and low byte of destination address.
MOV R5, #64d
MOV DPTR, #SHSL
MOV R1, #SL
MOV R2, #SH
MOV R3, #DL
MOV R4, #DH
; NUMBER OF BYTES TO MOVE
; LOAD SOURCE ADDRESS
; SAVE LOW BYTE OF SOURCE
; SAVE HIGH BYTE OF SOURCE
; SAVE LOW BYTE OF DESTINATION
; SAVE HIGH BYTE OF DESTINATION
# CYCLES
2
3
2
2
2
2
MOVE:
; THIS LOOP IS PERFORMED THE NUMBER OF TIMES LOADED INTO R5, IN THIS EXAMPLE 64
MOVX
MOV
MOV
MOV
MOV
MOVX
INC
MOV
MOV
MOV
MOV
INC
DJNZ
A, @DPTR
R1, DPL
R2, DPH
DPL, R3
DPH, R4
@DPTR, A
DPTR
R3, DPL
R4, DPH
DPL, R1
DPH, R2
DPTR
R5, MOVE
; READ SOURCE DATA BYTE
; SAVE NEW SOURCE POINTER
;
; LOAD NEW DESTINATION
;
; WRITE DATA TO DESTINATION
; NEXT DESTINATION ADDRESS
; SAVE NEW DESTINATION POINTER
;
; GET NEW SOURCE POINTER
;
; NEXT SOURCE ADDRESS
; FINISHED WITH TABLE?
2
2
2
2
2
2
3
2
2
2
2
3
3
12 of 42

12 Page





SeitenGesamt 42 Seiten
PDF Download[ DS80C320-ECL Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
DS80C320-ECGHigh-Speed/Low-Power MicroDallas Semiconducotr
Dallas Semiconducotr
DS80C320-ECLHigh-Speed/Low-Power MicroDallas Semiconducotr
Dallas Semiconducotr

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche