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FDS3570 Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer FDS3570
Beschreibung 80V N-Channel PowerTrench MOSFET
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 8 Seiten
FDS3570 Datasheet, Funktion
May 1999
PRELIMINARY
FDS3570
80V N-Channel PowerTrenchTM MOSFET
General Description
This N-Channel Logic Level MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.
These MOSFETs feature faster switching and lower gate
charge than other MOSFETs with comparable RDS(on)
specifications resulting in DC/DC power supply designs
with higher overall efficiency.
Features
• 9 A, 80 V. RDS(ON) = 0.019 @ VGS = 10 V
RDS(ON) = 0.022 @ VGS = 6 V.
• Fast switching speed.
• High performance trench technology for extremely
low RDS(ON).
• High power and current handling capability.
D
D
D
D
SO-8
G
SS
S
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
PD
TJ, Tstg
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
(Note 1a)
- Pulsed
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJC Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
FDS3570
FDS3570
13’’
5
6
7
8
Ratings
80
±20
9
50
2.5
1.2
1
-55 to +150
50
25
Tape Width
12mm
1999 Fairchild Semiconductor Corporation
4
3
2
1
Units
V
V
A
W
°C
°C/W
°C/W
Quantity
2500 units
FDS3570 Rev. B






FDS3570 Datasheet, Funktion
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
T
P0
D0
K0
Wc
B0
Tc
A0 P1 D1
User Direction of Feed
E1
F
E2
W
Dimensions are in millimeter
Pkg type
A0
SOIC(8lds) 6.50
(12mm)
+/-0.10
B0
5.30
+/-0.10
W
12.0
+/-0.3
D0 D1 E1 E2
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
10.25
min
F P1
5.50
+/-0.05
8.0
+/-0.1
P0
4.0
+/-0.1
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum
Typical
component
cavity
B0 center line
20 deg maximum component rotation
Sketch A (Side or Front Sectional View)
Component Rotation
SOIC(8lds) Reel Configuration: Figure 4.0
Typical
component
A0 center line
Sketch B (Top View)
Component Rotation
K0
2.1
+/-0.10
T
0.450
+/-
0.150
Wc
9.2
+/-0.3
Tc
0.06
+/-0.02
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
W1 Measured at Hub
Dim A
Max
Dim A
max
Dim N
See detail AA
7" Diameter Option
B Min
Dim C
See detail AA
Dim D
W3 min
13" Diameter Option
W2 max Measured at Hub
Tape Size
Reel
Option
12mm
7" Dia
12mm
13" Dia
Dimensions are in inches and millimeters
Dim A Dim B
Dim C
7.00
177.8
13.00
330
0.059
1.5
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
512 +0.020/-0.008
13 +0.5/-0.2
Dim D
0.795
20.2
0.795
20.2
Dim N
2.165
55
7.00
178
Dim W1
0.488 +0.078/-0.000
12.4 +2/0
0.488 +0.078/-0.000
12.4 +2/0
DETAIL AA
Dim W2
0.724
18.4
0.724
18.4
Dim W3 (LSL-USL)
0.469 – 0.606
11.9 – 15.4
0.469 – 0.606
11.9 – 15.4
© 1998 Fairchild Semiconductor Corporation
July 1999, Rev. B

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