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PDF FM75 Data sheet ( Hoja de datos )
| Número de pieza | FM75 | |
| Descripción | Low Voltage 2-Wire Digital Temperature Sensor with Thermal Alarm | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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www.fairchildsemi.com
FM75
Low Voltage 2-Wire Digital Temperature Sensor
with Thermal Alarm
Features
• User Configurable to 9, 10, 11 or 12-bit Resolution
• Precision Calibrated to ±1°C from 0°C to 100°C Typical
• Temperature Range: –40°C to 125°C
• Low Operating Current (less than 250µA)
• Low Self Heating (0.2°C max in still air)
• Operating Voltage Range: 2.7V to 5.5V
Applications
• Battery Management
• FAX Management
• Printers
• Portable Medical Instruments
• HVAC
• Power Supply Modules
• Disk Drives
• Computers
• Automotive
Description
Within the FM75 are: a high-precision CMOS temperature
sensor, a Delta-Sigma analog-to-digital converter and a
SMBus compatible serial digital interface. Typical accuracy
is ±2°C over the full temperature range of –40°C to 125°C
and to ±1°C over the range of 0°C to 100°C, with 9- to 12-bit
resolution. Default resolution is 9 bits.
Thermal Alarm output, OS (Over-limit Signal) supports
Interrupt and Comparator modes. OS is active, if the
user-programmable trip-temperature is exceeded. When
the temperature falls below the trip-temperature plus the
user-programmable hysteresis limit, OS is disabled.
Available packages are surface mount SOIC-8 (SOP-8) and
MSOP-8.
Application Diagram
2.7 to 5.5V
A0 7
User
Programmable
A1
6
Address
A2 5
SMBus
Interface
SDA
SCL
1
2
8
FM75
8 Pin
Configuration
4
3 O.S.
REV. 1.0.4 10/3/02
1 page  
PRODUCT SPECIFICATION
FM75
Basic Operation
The FM75 temperature sensing circuitry continuously
produces an analog voltage that is proportional to the device
temperature. At regular intervals the FM75 converts the
analog voltage to a two’s complement digital value, which is
placed into the temperature register.
The FM75 has an SMBus compatible digital serial interface
which allows the user to access the data in the temperature
register at any time. In addition, the serial interface gives the
user easy access to all other FM75 registers to customize
operation of the device.
The FM75 temperature-to-digital conversion can have 9,
10, 11, or 12-bit resolution as selected by the user, providing
0.5°C, 0.25°C, 0.125°C, and 0.0625°C temperature
resolution, respectively. At power-up the default conversion
resolution is 9-bits. The conversion resolution is controlled
by the R0 and R1 bits in the Configuration Register.
Table 1 gives examples of the relationship between the
output digital data and the external temperature. The 9-bit,
10-bit, 11-bit and 12-bit columns in Table 1 indicate the
right-most bit in the output data stream that can contain
temperature information for each conversion accuracy.
Since the output digital data is in two’s-complement format,
the most significant bit of the temperature is the “sign” bit.
If the sign bit is a zero, the temperature is positive and if the
sign bit is a one, the temperature is negative.
The FM75 has a Shutdown Mode that reduces the operating
current of the FM75 to 150nA. This mode is controlled by
the SD bit in the configuration register.
Power Up Default Conditions
The FM75 always powers up in the following default state:
• Thermostat mode: Comparator Mode
• O.S. polarity: active low
• Fault tolerance: 1 fault (i.e., F0 = 0 and F1 = 0 in the
Configuration Register)
• TOS = 80°C
• THYST = 75°C
• Register pointer: 00 (Temperature Register)
• Conversion resolution: 9 bits (i.e., R0 = 0 and R1 = 0 in
the Configuration Register)
After power up these conditions can be reprogrammed via
the serial interface. Refer to the Serial Data Bus Operation
section for FM75 programming instructions.
Thermal Alarm Function
The FM75 thermal alarm function provides user program-
mable thermostat capability and allows the FM75 to function
as a stand alone thermostat without using the serial interface.
The Over-Limit Signal (O.S.) output is the alarm output. This
signal is an open drain output, and at power-up this pin is
configured with active-low polarity.
Table 1. Relationship Between Temperature and
Digital Output
Temperature
Digital Output
Number of
Sig
bits used
by
conversion
bit
bit
bit
bit
Always
zero
resolution 9 10 11 12
12-Bit Resolution
0000
All
Temperatures
11-Bit Resolution
10 -Bit Resolution
0 0000
0 0 0000
9-Bit Resolution
0 0 0 0000
+125°C
0 111 1101 0 0 0 0 0000
+100.0625°C 0 110 0100 0 0 0 1 0000
+50.125°C
0 011 0010 0 0 1 0 0000
+12.25°C
0 000 1100 0 1 0 0 0000
0°C 0 000 0000 0 0 0 0 0000
-20.5°C
1 110 1011 1 0 0 0 0000
-33.25° C
1 101 1110 1 1 0 0 0000
-45.0625°C
1 101 0010 1 1 1 1 0000
-55° C
1 100 1001 0 0 0 0 0000
The O.S. polarity is controlled by the POL bit in the
Configuration Register. The user-programmable upper
trip-point temperature for the thermal alarm is stored in
the TOS Register, and the user-programmable hysteresis tem-
perature (i.e., the lower trip point) is stored in the THYST
Register.
The thermal alarm has two modes of operation: Comparator
Mode and Interrupt Mode. At power-up the default is
Comparator Mode. The alarm mode is controlled by the
CMP/INTR bit in the Configuration Register.
Fault Tolerance
For both Comparator and Interrupt modes, the alarm “fault
tolerance” setting plays a role in determining when the O.S.
output will be activated. Fault tolerance refers to the number
of consecutive times an error condition must be detected
before the user is notified. Higher fault tolerance settings can
help eliminate false alarms caused by noise in the system.
The alarm fault tolerance is controlled by bits F0 and F1 in
the Configuration Register. These bits can be used to set
the fault tolerance to 1, 2, 4 or 6 as shown in Table 4. At
power-up, these bits both default to 0 (fault tolerance = 1).
REV. 1.0.4 10/3/02
5
5 Page 
PRODUCT SPECIFICATION
FM75
Reading
If the pointer is already pointing to the desired register, the
master can read from that register by setting the read/write
bit (following the slave address) to a 1. After sending an
ACK, the FM75 will begin transmitting data during the
following clock cycle. If the Configuration Register is
being read, the FM75 will transmit one byte of data (see
Figure 10). The master device should respond with a NACK
followed by a stop condition. If the Temperature, TOS or
THYST Register is being read, the FM75 will transmit two
bytes of data (see Figure 9). The master must respond to the
first byte of data with an ACK and to the second byte of data
with a NACK followed by a stop condition.
To read from a register other than the one currently being
pointed to by the Command Register, a pointer set to the
desired register must be done as described previously.
Immediately following the pointer set, the master must
perform a repeat start condition (see Figures 8 and 12) which
indicates to the FM75 that a new operation is about to occur.
It is important to note that if the repeat start condition does
not occur, the FM75 will assume that a write is taking place,
and the selected register will be overwritten by the upcoming
data on the data bus. After the start condition, the master
must again send the device address and read/write bit. This
time the read/write bit must be set to 1 to indicate a read. The
rest of the read cycle is the same as described in the previous
paragraph for reading from a preset pointer location.
Writing
All writes must be proceeded by a pointer set as described
previously, even if the pointer is already pointing to the
desired register.
Immediately following the pointer set, the master must
begin transmitting the data to be written. If the master is
writing to the Configuration Register, one byte of data must
be sent (see Figure 13). If the TOS or THYST Register is
being written to, the master must send two bytes of data
(see Figure 11). After transmitting each byte of data, the
master must release the SDA line for one clock to allow the
FM75 to acknowledge receiving the byte. The write
operation should be terminated by a stop signal from the
master.
Inadvertent 8-Bit Read from a 16-Bit
Register: A Caution
An inadvertent 8-bit read from a 16-bit register, with the
D7 bit low, can cause the FM75 to pause in a state where the
SDA line is pulled low by the output data and is incapable of
receiving either a stop or a start condition from the master.
The only way to remove the FM75 from this state is to
continue clocking for 9 cycles until SDA goes high, at which
time issuing a stop condition will reset the FM75. This
sequence can be seen in Figure 7 below.
Nine additional clock cycles to reset the FM75
SCL
SDA
1 0 0 1 A2 A1 A0 R/W A D7 D6 D5 D4 D3 D2 D1 D0 N D7
D6 D5 D4 D3 D2 D1 D0 N
Start
from
Master
Address Byte
Ack
from
FM75
Most Significant
Data Byte
No Ack
from
Master
(from FM75)
Stop intended by
Master, but FM75
SDA line locked
low
Master must
detect error
condition on
FM75
No Ack Stop
from Condition
Master from
Master
Figure 7. Inadvertent 8-Bit Read from 16-Bit Register Where D7 = 0 and Forces Output Low
REV. 1.0.4 10/3/02
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet FM75.PDF ] | |
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