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FIN1108 Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer FIN1108
Beschreibung LVDS 8 Port High Speed Repeater
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 7 Seiten
FIN1108 Datasheet, Funktion
March 2002
Revised May 2003
FIN1108 FIN1108T (Preliminary)
LVDS 8 Port High Speed Repeater
General Description
This 8 port repeater is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology.
The FIN1108 accepts and outputs LVDS levels with a typi-
cal differential output swing of 330 mV which provides low
EMI at ultra low power dissipation even at high frequen-
cies. The FIN1108 provides a VBB reference for AC cou-
pling on the inputs. In addition the FIN1108 can directly
accept LVPECL, HSTL, and SSTL-2 for translation to
LVDS.
The FIN1108T has internal termination across the receiver
inputs for reduced part count, reduced stub length and bet-
ter noise immunity. See Applications section.
Features
s Greater than 800 Mbps data rate
s 3.3V power supply operation
s 3.5 ps maximum random jitter and 135 ps maximum
deterministic jitter
s Wide rail-to-rail common mode range
s LVDS receiver inputs accept LVPECL, HSTL, and
SSTL-2 directly
s Ultra low power consumption
s 20 ps typical channel-to-channel skew
s Power off protection
s > 7.5 kV HBM ESD Protection
s Meets or exceeds the TIA/EIA-644-A LVDS standard
s Available in space saving 48-lead TSSOP package
s Open circuit fail safe protection
s VBB reference output
s FIN1108T (RT) features Internal Termination Resistors
Ordering Code:
Order Number Package Number
Package Description
FIN1108MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
FIN1108TMTD
(Preliminary)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
© 2003 Fairchild Semiconductor Corporation DS500655
www.fairchildsemi.com






FIN1108 Datasheet, Funktion
FIGURE 4. AC Waveform
Note A: All LVTTL input pulses have frequency = 10MHz, tR or tF < = 2 ns
Note B: CL includes all probe and jig capacitances
FIGURE 5. Differential Driver Enable and Disable Circuit
www.fairchildsemi.com
FIGURE 6. Enable and Disable AC Waveforms
6

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