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M-8870-01 Schematic ( PDF Datasheet ) - Clare Inc.

Teilenummer M-8870-01
Beschreibung DTMF Receiver
Hersteller Clare Inc.
Logo Clare  Inc. Logo 




Gesamt 9 Seiten
M-8870-01 Datasheet, Funktion
Features
Low Power Consumption
Adjustable Acquisition and Release Times
Central Office Quality and Performance
Power-down and Inhibit Modes (-02 only)
Inexpensive 3.58 MHz Time Base
Single 5 Volt Power Supply
Dial Tone Suppression
Applications
Telephone switch equipment
Remote data entry
Paging systems
Personal computers
Credit card systems
Pin Configuration
Block Diagram
M-8870
DTMF Receiver
Description
The M-8870 is a full DTMF Receiver that integrates
both bandsplit filter and decoder functions into a single
18-pin DIP or SOIC package. Manufactured using
CMOS process technology, the M-8870 offers low
power consumption (35 mW max) and precise data
handling. Its filter section uses switched capacitor
technology for both the high and low group filters and
for dial tone rejection. Its decoder uses digital counting
techniques to detect and decode all 16 DTMF tone
pairs into a 4-bit code. External component count is
minimized by provision of an on-chip differential input
amplifier, clock generator, and latched tri-state inter-
face bus. Minimal external components required
include a low-cost 3.579545 MHz color burst crystal, a
timing resistor, and a timing capacitor.
The M-8870-02 provides a “power-down” option
which, when enabled, drops consumption to less
than 0.5 mW. The M-8870-02 can also inhibit the
decoding of fourth column digits (see Tone Decoding
table on page 5).
Ordering Information
Part #
M-8870-01
Description
18-pin plastic DIP
M-8870-01SM 18-pin plastic SOIC
M-8870-01SMTR 18-pin plastic SOIC, tape and reel
M-8870-02
18-pin plastic DIP, power-down,
option
M-8870-02SM
18-pin plastic SOIC, power-down,
option
M-8870-02T
18-pin plastic SOIC, power-down
option, tape and reel
DS-M8870-R3
www.clare.com
1






M-8870-01 Datasheet, Funktion
M-8870
AC Characteristics
Parameter
Symbol Min
Typ*
Max
Units
Valid input signal levels (each tone
- -29 - +1 dBm
of composite signal)
- 27.5 -
869 mVRMS
Positive twist accept
- - - 10
dB
Negative twist accept
- - - 10
dB
Frequency deviation accept limit
- - - ± 1.5% + 2 Hz Nom.
Frequency deviation reject limit
- ±3.5% - - Nom.
Third tone tolerance
- -25 -16
-
dB
Noise tolerance
- - -12 -
dB
Dial tone tolerance
- +18 +22
-
dB
Tone present detection time
tDP 5 8 14
ms
Tone absent detection time
tDA 0.5
3
8.5
ms
Minimum tone duration accept
tREC - - 40
ms
Maximum tone duration reject
tREC 20
-
-
ms
Minimum interdigit pause accept
tID - - 40
ms
Maximum interdigit pause reject
tDO 20
-
-
ms
Propagation delay (St to Q)
tPQ - 6 11
µs
Propagation delay (St to StD)
tPStD
-
9
16
µs
Output data setup (Q to StD)
tQStD - 4.0
-
µs
Propagation delay (OE to Q), enable
tPTE - 50 60
ns
Propagation delay (OE to Q), disable
tPTD - 300
-
ns
Crystal clock frequency
fCLK 3.5759 3.5795 3.5831
MHz
Clock output (OSC2), capacitive load CLO - - 30
pF
All voltages referenced to VSS unless otherwise noted. For typical values VDD = 5.0 V, VSS = 0 V, TA = 25°C, fCLK = 3.579545 MHz.
*Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Notes:
1. dBm = decibels above or below a reference power of 1 mW into a 600load.
2. Digit sequence consists of all 16 DTMF tones.
3. Tone duration = 40 ms. Tone pause = 40 ms.
4. Nominal DTMF frequencies are used, measured at GS.
5. Both tones in the composite signal have an equal amplitude.
6. Bandwidth limited (0 to 3 kHz) Gaussian noise.
7. The precise dial tone frequencies are (350 and 440 Hz) ± 2%.
8. For an error rate of better than 1 in 10,000.
9. Referenced to lowest level frequency component in DTMF signal.
10. Minimum signal acceptance level is measured with specified maximum frequency deviation.
11. Input pins defined as IN+, IN-, and OE.
12. External voltage source used to bias VREF.
13. This parameter also applies to a third tone injected onto the power supply.
14. Referenced to Single - Ended Input Configuration on page 3. Input DTMF tone level at -28 dBm.
Notes
1,2,3,4,5,8
2,3,4,8
2,3,5,8,10
2,3,5
2,3,4,5,8,9,13,14
2,3,4,5,6,8,9
2,3,4,5,7,8,9
See Timing Diagram on page 7
User adjustable (see Basic Steering
Circuit and Guard Time Adjustment
on pages 3 and 4.)
OE = VDD
RL = 10 k, CL = 50 pF
-
-
6
www.clare.com
Rev. 3

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