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LX1689IPW Schematic ( PDF Datasheet ) - Microsemi Corporation

Teilenummer LX1689IPW
Beschreibung Third Generation CCFL Controller
Hersteller Microsemi Corporation
Logo Microsemi Corporation Logo 




Gesamt 15 Seiten
LX1689IPW Datasheet, Funktion
INTEGRATED PRODUCTS
LX1689
Third Generation CCFL Controller
PRODUCTION DATA SHEET
DESCRIPTION
The LX1689 is the latest generation
The brightness control input allows the
Direct Drive CCFL (Cold Cathode use of either a DC voltage or a PWM
Fluorescent Lamp) Controller. It uses input to simplify design. Programmable
new circuit design techniques (patents polarity brightness control is retained,
pending) and combines digital and linear except in the case of externally clocked
circuits with an advanced BiCMOS digital dimming. Two onboard LDO
process to create a more complete regulators extend the input voltage range
controller in a small package.
of the IC up to 28 Volts without using
When compared to the original external circuitry as was required with our
LX1686 design, identical module previous controllers. The LX1689
applications use from 12 to 30 less includes a new lamp strike detection
components. New functions and scheme that saves a package pin and three
enhancements have been added to make external components. Internal circuits
the LX1689 even easier to use.
monitor lamp current pulses at the I_SNS
The on-chip PLL circuit used to input to determine if the lamp strikes and
synchronize the digital dimming burst if it stays ignited once operational.
frequency to the video frame rate, as
Integrating full wave rectifiers for
used in the LX1686, is replaced with a each of three lamp inputs has significantly
programmable counter. This counter can reduced the lamp feedback component
divide the video controller horizontal count. In addition the controller features
sync pulse, other external clock source include auto shutdown for open or broken
or the internal chip clock source to lamps, and a lamp fault detection with a
generate the burst frequency.
status reporting output.
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
KEY FEATURES
ƒ 3 to 28 Volt Single Fixed (±20%)
Supply Operating Range
ƒ Selectable Analog/Digital
Dimming Modes
ƒ Digital Dimming Can Synch to
External Or Internal Clocks
ƒ User Programmable Digital
Dimming Burst Frequency
ƒ 252 mS Power On Delay
ƒ Flexible Lamp Current
Compensation Input
ƒ Open Lamp Shutdown and Fault
Output Indicator
ƒ “On Chip” Full Wave Lamp
Current & Voltage Rectifiers
ƒ 20 Pin TSSOP Package
BENEFITS
ƒ Low Component Count /
Module Cost / Size
ƒ High “Nits/Watt” Efficiency
ƒ Operates Directly From 1 to 6
Li_Ion Cells
ƒ Lamp Current Compensation
Input Makes Indoor/Outdoor
And Wide Temperature Range
Applications Easy to Design
PRODUCT HIGHLIGHT
LX1689 CCFL Inverter Layouts Examples*
2.64in. (67mm)
Actual Inverter Size
OR
1.38in. (35mm)
.397 in.
(10mm)
.870 in.
(22mm)
Actual Inverter Size
*As Shown in Figure 1 (Typical Application)
Bill of Materials
1 LX1689CPW
1 Transformer
1 Dual FET
2 Connectors
7 Resistors
9 Capacitors
21 Total Count
Copyright 2000
Rev. 1.0b, 2003-03-31
TJ (°C)
0 to 70
-40 to 85
PACKAGE ORDER INFO
MIN VDD
3V
3V
MAX VDD
28V
28V
Plastic TSSOP
PW 20-PIN
LX1689CPW
LX1689IPW
Note: Available in Tape & Reel.
Append the letter “T” to the part number. (i.e. LX1689CPWT)
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 1






LX1689IPW Datasheet, Funktion
INTEGRATED PRODUCTS
LX1689
Third Generation CCFL Controller
PRODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS (CONTINUED)
Parameter
Symbol
Test Conditions
` RAMP GENERATOR
Max Strike / Run Frequency Ratio
FRAMP_STK Ratio to run frequency, I_SNS = OV_SNS = 0V
Maximum Lamp Run Frequency
FRAMP_RUNMAX Lamp is ignited; I_R=10K
Lamp Run Frequency
FLAMP_RUN Lamp is ignited ;TA = 25°C
Lamp Run Frequency
FLAMP_RUN Lamp is ignited
Lamp Run Frequency Regulation over
V_BATT
FLAMP_REG
3.3 < VBATT < 28V
Internal Digital Dimming
Burst Frequency
FBURST
DIV_248 = VDD_A, DIM_MODE = 0V
DIV_248 = Floating, DIM_MODE = 0V
DIV_248 = Gnd, DIM_MODE = 0V
` BIAS BLOCK
Voltage at Pin I_R
V_IR VBATT = 2.8V to 28V, IOUT = 0 to 100uA, TA = 25°C
Pin I_R Max Source Current
Voltage Reference Voltage
(Internal node)
` PWM BLOCK
IMAX_IR
V2P0
I_R = 0V
TA = 25°C, reference use only
Error Amp Transconductance
Error Amp Output Source Current
Error Amp Output Sink Current
Error Amp Output High Voltage
Error Amp Output Low Voltage
Error Amp Input Offset Voltage
Max Duty Cycle
Ramp Valley Voltage
Ramp Peak Voltage
` OUTPUT BUFFER BLOCK
GM_EAMP
IS_EAMP
ISK_EAMP
VH_EAMP
VL_EAMP
VOS_EAMP
DCMAX
RVV
RPV
BRITE_OUT – EA_IN = 50mV
EA_IN – BRITE_OUT = 50mV
Output Sink Current
Output Source Current
Output Rise Time
Output Fall Time
` DIM_CLK INPUT
ISK_OUTBUF
IS_OUTBUF
TR
TF
VAOUT, VBOUT = VDD_P
VAOUT, VBOUT = 0V
COUT = 1000pF
COUT = 1000pF
Pull-up Resistance
To VDDA
Input High Threshold
VTH_DIM_CLK Conventional Dimming
Input Low Threshold
VTL_DIM_CLK Reverse Dimming
Input High Current
IIH_DIM_CLK DIM_CLK = 5V
Input Low Current
IIL_DIM_CLK DIM_CLK = 0V
` TRI-STATE LOGIC INPUTS (DIM_MODE,DIV_248)
Low State
VTL_TRI_
Floating State
VTF_TRI
High State
VTH_TRI
Input High Current
IIH_TRI
DIM_MODE = DIV_248 = 5V
Input Low Current
IIL_TRI
DIM_MODE = DIV_248 = 0V
LX1689
Min Typ Max
45
250 450
63 65
61 65
0.1
254
127
63.5
6
67
69
0.95 1.0 1.05
100 700
1.99 2 2.01
90 180
5 12
5 12
2.5 2.9
0.015 0.5
70
44
200
1.95
100
100
25 200
25 200
50
0.9 1.4
0.4 0.9
45 70
-65 -100
0.4 0.6
1.2 1.35 1.8
2.1 2.8
70 120
-25 -50
Units
KHz
KHz
KHz
%
Hz
Hz
Hz
V
µA
V
µmho
µA
µA
V
V
mV
%
mV
V
mA
mA
nS
nS
K
V
V
µA
µA
V
V
V
µA
µA
Copyright 2000
Rev. 1.0b, 2003-03-31
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6

6 Page









LX1689IPW pdf, datenblatt
INTEGRATED PRODUCTS
LX1689
Third Generation CCFL Controller
PRODUCTION DATA SHEET
DESCRIPTION (CONTINUED)
LX1689 OPERATION
Four operating modes: Power On Delay, Strike, Run, and Fault
modes are employed by the LX1689. Upon power up or ENABLE
going true, Power On Delay is automatically invoked.
Immediately after termination of Power On Delay, or ENABLE
going true, strike mode is entered. After a successful strike, e.g.
lamp is ignited, run mode is entered. If ignition is unsuccessful, or
if the lamp extinguishes while running, Fault mode is entered.
Lamp ignition is determined by monitoring the lamp current
feedback voltage at pin I_SNS. Lamp current cycles are counted
from the beginning of Strike mode. If 8 or more complete cycles
occur the lamp is declared ignited. If less than 8, the lamp is
considered not ignited and Strike mode continues until ignition is
detected or strike time out is reached.
After run mode is entered lamp current cycles are sampled every
8192 x 1/fO to determine that the lamp has not inadvertently
extinguished. If at least 8 lamp current pulses are counted in each
sample, Run mode is maintained. Otherwise, Fault mode is
entered. Strike mode can be entered only once for each on/off cycle
of either V_BATT or ENABLE. This insures that even
intermittent lamp failures cannot cause the module to continuously
output maximum strike voltage.
Power ON Delay Mode
All functions are activated except that AOUT and BOUT are
inhibited. Delay is 16384 x 1/fO determined by counting Ramp
clocks. The first of 16 sweeps is decoded as the power on delay
period. The subsequent 15 sweeps are used for controlling the
Ramp generator during Strike Mode. Power on delay is activated
at every V_BATT power up sequence and ENABLE sequence.
Strike Mode
Entered from Power On Delay, or upon an ENABLE sequence.
Control of the Ramp Generator frequency is switched to a DAC
output. Frequency is increased in a saw tooth fashion from normal
run value to as high as five times that value, for up to 15 sweeps.
If while strike frequency is ramping up, the over voltage set point
at OV_SNS is detected, strike frequency will freeze at that value
until either the lamp strikes or the timeout is reached. Strike Mode
is terminated by reaching 15 sweep counts or by detecting lamp
ignition. If strike is successful, Run Mode is entered. If
unsuccessful, Fault mode is entered, a fault is declared and the A &
B outputs are shut off.
The purpose of sweeping lamp frequency up during strike is to
operate at the unloaded resonant frequency of the transformer and
lamp load. This generates the high lamp striking voltage required,
since at resonance, output voltage from the transformer will
increase to any value needed to cause ignition. A capacitive
voltage divider provides output voltage feedback to the OV_SNS
pin, which freezes Strike Frequency to limit maximum output
voltage to a safe value.
Since strike frequency is held constant once the LX1689 senses
maximum safe output voltage, maximum strike potential is
continuously impressed across the lamp for the entire strike period.
Because strike frequency is ramped up rather than simply
stepped, the entire range of possible self-resonant frequencies is
covered. Transformer manufacturing is simplified and parasitic
panel capacitance values are no longer critical. The 5:1 strike
frequency range easily covers the self-resonant frequency of all
practical lamp assembly and transformer combinations.
The only way to re-initiate the strike process is to either cycle
V_BATT or ENABLE off and on.
If ignition is successful, ramp frequency immediately returns to
its normal run value.
Run Mode
Entered only by detection of a successful Strike. Ramp generator
frequency control is immediately switched from DAC output to a
fixed reference that sets the normal run frequency. During Run
mode, the Fault Detect Counter is reset approximately every 8192 x
1/fO. The lamp current cycle counter is monitored to insure at least
8 current cycles received during each period. If less than 8, the
lamp is considered extinguished and the Fault Mode is entered.
Fault Mode
Fault Mode may be entered from either Strike or Run Mode as
described above. In Fault Mode, the A & B output drivers are
forced low and the BRITE_C pin is driven to VDD_A to indicate
the fault condition. Fault mode may be cleared by cycling
ENABLE off then on, or by removing and applying V_BATT.
External load on the BRITE_C pin is limited to a filter capacitor and
single CMOS gate input.
DESIGN PROCEDURE
Selecting the I_R resistor value
This resistor determines the frequency of the on chip oscillator.
The output of the oscillator, RAMP_C, controls all timing functions.
It must be chosen first, and will be in the range of 10K to 150K
ohms. The output frequency approximated by the following
formula : RI_R = 5.24E9 / FLAMPOUT(Hz)
RAMP_C frequency is twice lamp output current frequency.
Driving the BRITE_IN Input
BRITE_IN can be a DC voltage, a low frequency PWM signal
that produces direct digital dimming, or a higher frequency PWM
signal that is converted to a proportional DC level by adding a filter
capacitor at the BRITE_C pin. 100% duty cycle corresponds to 1.1
volt, and 0% duty cycle corresponds to zero volts at the BRITE_C
pin. Maximum BRITE_IN input frequency for PWM inputs is 100
KHz, but when converting frequencies above 25 KHz to DC, some
accuracy is lost. The BRITE_IN input circuitry includes on-chip
active voltage clamps that ignore input voltage greater than 2.0V
and less than 0.5V. This allows the use of digital PWM input
signals where brightness is dependent only on duty cycle, with no
contribution
Copyright 2000
Rev. 1.0b, 2003-03-31
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
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