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PDF CXK5T8257BTM Data sheet ( Hoja de datos )
| Número de pieza | CXK5T8257BTM | |
| Descripción | 32768-word X 8-bit High Speed CMOS Static RAM | |
| Fabricantes | Sony Corporation | |
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CXK5T8257BTM/BYM/BM -10LLX/12LLX
32768-word × 8-bit High Speed CMOS Static RAM Preliminary
For the availability of this product, please contact the sales office.
Description
The CXK5T8257BTM/BYM/BM is 262,144 bits high
speed CMOS static RAM organized as 32768-words
CXK5T8257BTM
28 pin TSOP (Plastic)
CXK5T8257BYM
28 pin TSOP (Plastic)
by 8 bits.
Special feature are low power consumption and
high speed.
The CXK5T8257BTM/BYM/BM is a suitable RAM
for portable equipment with battery back up.
Features
• Extended operating temperature range: –25 to +85°C
• Wide supply voltage range operation: 2.7 to 3.6V
• Fast access time:
(Access time)
3.0V operation -10LLX 100ns (Max.)
-12LLX 120ns (Max.)
3.3V operation -10LLX
85ns (Max.)
-12LLX 100ns (Max.)
• Low standby current: 7.0µA (Max.)
• Low power data retention: 2.0V (Min.)
• Available in many packages
CXK5T8257BTM/BYM
8mm × 13.4mm 28 pin TSOP Package
CXK5T8257BM
450mil 28 pin SOP Package
Function
32768-word × 8 bit static RAM
CXK5T8257BM
28 pin SOP (Plastic)
Block Diagram
A14
A13
A12
A11 Memory
A9
Buffer
Row
Decoder
Matrix
A8
A7 512 × 512
A6
A5
VCC
GND
Structure
Silicon gate CMOS IC
A10
A4
A3 Buffer
A2
A1
A0
I/O Gate
Column
Decoder
OE
Buffer
WE
CE
I/O Buffer
I/O1 I/O8
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
PE96509-ST
1 page  
CXK5T8257BTM/BYM/BM
• Read cycle (WE = “H”)
VCC = 2.7 to 3.6V
VCC = 3.3V ± 0.3V
Item
Symbol -10LLX
-12LLX
-10LLX
-12LLX Unit
Min. Max. Min. Max. Min. Max. Min. Max.
Read cycle time
tRC 100 — 120 — 85 — 100 —
Address access time
tAA — 100 — 120 — 85 — 100
Chip enable access time (CE)
tCO — 100 — 120 — 85 — 100
Chip enable to output valid
tOE — 50 — 60 — 50 — 50
Chip hold from address change
tOH 20 — 20 — 20 — 20 — ns
Chip enable to output in low Z (CE)
tLZ
10 — 10 — 10 — 10 —
Output enable to output in low Z (OE) tOLZ 10 — 10 — 10 — 10 —
Chip disable to output in high Z (CE) tHZ∗1 — 35 — 40 — 35 — 35
Output disable to output in high Z (OE) tOHZ∗1 — 35 — 35 — 35 — 35
∗1 tHZ and tOHZ are defined as the time required for outputs to turn to high impedance state and are not referred
to as output voltage levels.
• Write cycle
VCC = 2.7 to 3.6V
VCC = 3.3V ± 0.3V
Item
Symbol -10LLX
-12LLX
-10LLX
-12LLX Unit
Min. Max. Min. Max. Min. Max. Min. Max.
Write cycle time
tWC 100 — 120 — 85 — 100 —
Address valid to end of write
tAW 80 — 100 — 80 — 80 —
Chip enable to end of write
tCW 80 — 100 — 80 — 80 —
Data to write time overlap
tDW 35 — 50 — 35 — 35 —
Data hold from write time
tDH 0 — 0 — 0 — 0 —
Write pulse width
tWP 60 — 70 — 60 — 60 — ns
Address setup time
tAS 0 — 0 — 0 — 0 —
Write recovery time (WE)
tWR 0 — 0 — 0 — 0 —
Write recovery time (CE)
tWR1
0—
0—
0—0—
Output active from end of write
Write to output in high Z
tOW 10 — 10 — 10 — 10 —
tWHZ∗2 — 35 — 40 — 35 — 35
∗2 tWHZ is defined as the time requied for outputs to turn to high impedance state and is not referred to as
output voltage level.
–5–
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet CXK5T8257BTM.PDF ] | |
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| CXK5T8257BTM | 32768-word X 8-bit High Speed CMOS Static RAM | Sony Corporation |
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| CXK5T8257BTM-12LLX | 32768-word X 8-bit High Speed CMOS Static RAM | Sony Corporation |
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