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PDF LTC2900-1IMS Data sheet ( Hoja de datos )
| Número de pieza | LTC2900-1IMS | |
| Descripción | Programmable Quad Supply Monitor with Adjustable Reset Timer | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC2900
Programmable Quad Supply
Monitor with Adjustable Reset Timer
FEATURES
s Simultaneously Monitors Four Supplies
s 16 User Selectable Combinations of 5V, 3.3V, 3V,
2.5V, 1.8V, 1.5V and/or ±Adjustable Voltage
Thresholds
s Guaranteed Threshold Accuracy: ±1.5% of
Monitored Voltage Over Temperature
s Low Supply Current: 43µA Typ
s Adjustable Reset Time
s Small MSOP and 3mm × 3mm DFN Packages
s Manual Reset Pin
s Open-Drain RST Output (LTC2900-1)
s Push-Pull RST Output (LTC2900-2)
s Power Supply Glitch Immunity
s Guaranteed RST for VCC ≥ 1V
U
APPLICATIO S
s Desktop and Notebook Computers
s Multivoltage Systems
s Telecom Equipment
s Portable Battery-Powered Equipment
s Network Servers
DESCRIPTIO
The LTC®2900 is a programmable supply monitor for
systems with up to four supply voltages. One of 16 preset
or adjustable voltage monitor combinations can be se-
lected using an external resistor divider connected to the
program pin. The preset voltage thresholds are accurate
to ±1.5% over temperature.
The reset delay time is adjustable using an external
capacitor and the manual reset input may be used with a
momentary switch to issue reset pulses with programmed
duration. Tight voltage threshold accuracy and glitch
immunity ensure reliable reset operation without false
triggering. The RST output is guaranteed to be in the
correct state for VCC down to 1V. The LTC2900-1 features
an open-drain RST output, while the LTC2900-2 has a
push-pull RST output.
The 43µA supply current makes the LTC2900 ideal for
power conscious systems and it may be configured to
monitor less than four inputs. The parts are available in
the 10-lead MSOP and the 10-lead 3mm × 3mm DFN
packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
Quad Supply Monitor (5V, 3.3V, 2.5V, 1.8V)
DC/DC
CONVERTER
5V
3.3V
2.5V
1.8V
SYSTEM
LOGIC
C1
0.1µF
C2
0.1µF
R1
59k
1%
R2
40.2k
1%
V3 V4
V1
LTC2900-2
V2
VREF
VPG
GND
RST
PBR
CRT
PUSH-BUTTON
CRT
47nF
RESET
2900 TA01
tRST = 216ms
2900f
1
1 page  
TYPICAL PERFOR A CE CHARACTERISTICS
LTC2900
ADJ Threshold Voltage
vs Temperature
0.508
0.506
0.504
0.502
0.500
0.498
0.496
0.494
0.492
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80 100
2900 G07
IV1 vs Temperature
100
V1 = 5V
90 V2 = 3.3V
80
V3 = 2.5V
V4 = 1.8V
70
60
50
40
30
20
10
0
– 60 –40 – 20 0 20 40 60 80 100
TEMPERATURE (°C)
2900 G09
IV4 vs Temperature
1.0
V1 = 5V
0.9 V2 = 3.3V
0.8
V3 = 2.5V
V4 = 1.8V
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
– 60 –40 – 20 0 20 40 60 80 100
TEMPERATURE (°C)
2900 G12
– ADJ Threshold Voltage
vs Temperature
0.018
VREF vs Temperature
1.228
0.012
1.222
0.006
1.216
0 1.210
–0.006
1.204
–0.012
1.198
–0.018
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80 100
2900 G08
1.192
– 60 –40 – 20 0 20 40 60
TEMPERATURE (°C)
80 100
2900 G21
IV2 vs Temperature
1.5
V1 = 5V
1.4 V2 = 3.3V
1.3
V3 = 2.5V
V4 = 1.8V
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
– 60 –40 – 20 0 20 40 60 80 100
TEMPERATURE (°C)
2900 G10
IV3 vs Temperature
1.1
V1 = 5V
1.0 V2 = 3.3V
0.9
V3 = 2.5V
V4 = 1.8V
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
– 60 –40 – 20 0 20 40 60 80 100
TEMPERATURE (°C)
2900 G11
Typical Transient Duration
vs Comparator Overdrive (V1, V2)
450
TA = 25°C
400
350 RESET OCCURS
300 ABOVE CURVE
250
200
150
100
50
0
0.1 1
10 100
RESET COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX)
2900 G13
Typical Transient Duration
vs Comparator Overdrive (V3, V4)
220
TA = 25°C
200
180 RESET OCCURS
160 ABOVE CURVE
140
120
100
80
60
40
20
0
0.1 1 10 100
RESET COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX)
2900 G20
2900f
5
5 Page 
LTC2900
APPLICATIO S I FOR ATIO
Although all four supply monitor comparators have built-
in glitch immunity, bypass capacitors on V1 and V2 are
recommended because the greater of V1 or V2 is also the
VCC for the device. Filter capacitors on the V3 and V4
inputs are allowed.
Power-Down
On power-down, once any of the VX inputs drop below
their threshold, RST is held at a logic low. A logic low of
0.4V is guaranteed until both V1 and V2 drop below 1V. If
the bandgap reference becomes invalid (VCC < 2V typ), the
part will reprogram once VCC rises above 2.4V max.
Monitor Output Rise and Fall Time Estimation
The RST output has strong pull-down capability. If the
external load capacitance (CLOAD) is known, output fall
time (10% to 90%) is estimated using:
tFALL ≈ 2.2 • RPD • CLOAD
where RPD is the on-resistance of the internal pull-down
transistor. The typical performance curve (VOL vs ISINK)
demonstrates that the pull-down current is somewhat
linear versus output voltage. Using the 25°C curve, RPD is
estimated to be approximately 40Ω. Assuming a 150pF
load capacitance, the fall time is about 13.2ns.
Although the RST output of the LTC2900-1 is considered
to be “open-drain,” it does have weak pull-up capability
(see RST Pull-Up Current vs V2 curve). Output rise time
(10% to 90%) is estimated using:
tRISE ≈ 2.2 • RPU • CLOAD
where RPU is the on-resistance of the pull-up transistor.
The on-resistance as a function of the V2 voltage at room
temperature is estimated using:
RPU
=
6 • 105
V2 – 1
Ω
with V2 = 3.3V, RPU is about 260k. Using 150pF for load
capacitance, the rise time is 86µs. If the output needs to
pull up faster and/or to a higher voltage, a smaller
external pull-up resistor may be used. Using a 10k pull-
up resistor, the rise time is reduced to 3.3µs for a 150pF
load capacitance.
The LTC2900-2 has an active pull-up to V2 on the RST
output. The typical performance curve (RST Pull-Up Cur-
rent vs V2 curve) demonstrates that the pull-up current is
somewhat linear versus the V2 voltage and RPU is esti-
mated to be approximately 625Ω. A 150pF load capaci-
tance makes the rise time about 206ns.
Selecting the Reset Timing Capacitor
The reset time-out period is adjustable in order to accom-
modate a variety of microprocessor applications. The
reset time-out period, tRST, is adjusted by connecting a
capacitor, CRT, between the CRT pin and ground. The value
of this capacitor is determined by:
CRT = tRST • 217 • 10–9
with CRT in Farads and tRST in seconds. The CRT value per
millisecond of delay can also be expressed as CRT/ms =
217 (pF/ms).
Leaving the CRT pin unconnected will generate a mini-
mum reset time-out of approximately 50µs. Maximum
reset time-out is limited by the largest available low
leakage capacitor. The accuracy of the time-out period will
be affected by capacitor leakage (the nominal charging
current is 2µA) and capacitor tolerance. A low leakage
ceramic capacitor is recommended.
2900f
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LTC2900-1IMS.PDF ] | |
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