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PDF HT1622 Data sheet ( Hoja de datos )
| Número de pieza | HT1622 | |
| Descripción | RAM Mapping 64 x16 LCD Controller for I/O C | |
| Fabricantes | Holtek Semiconductor Inc | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HT1622 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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HT1622
RAM Mapping 32´8 LCD Controller for I/O mC
Features
· Operating voltage: 2.7V~5.2V
· Built-in RC oscillator
· 1/4 bias, 1/8 duty, frame frequency is 64Hz
· Max. 32´8 patterns, 8 commons, 32 segments
· Built-in internal resistor type bias generator
· 3-wire serial interface
· 8 kinds of time base/WDT selection
· Time base or WDT overflow output
· Built-in LCD display RAM
· R/W address auto increment
· Two selectable buzzer frequencies
(2kHz/4kHz)
· Power down command reduces power
consumption
· Software configuration feature
· Data mode and Command mode instructions
· Three data accessing modes
· VLCD pin to adjust LCD operating voltage
· Cascade application
General Description
HT1622 is a peripheral device specially de-
signed for I/O type mC used to expand the dis-
play capability. The max. display segment of
the device are 256 patterns (32´8). It also sup-
ports serial interface, buzzer sound, Watchdog
Timer or time base timer functions. The
HT1622 is a memory mapping and multi-func-
tion LCD controller. The software configuration
feature of the HT1622 make it suitable for mul-
tiple LCD applications including LCD modules
and display subsystems. Only three lines are
required for the interface between the host con-
troller and the HT1622. The HT162X series
have many kinds of products that match vari-
ous applications.
Selection Table
HT162X HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270
COM
4 4 8 8 8 8 16 16 16
SEG
32 32 32 32 48 64 48 64 64
Built-in Osc.
ÖÖ
ÖÖÖÖ
Crystal Osc. Ö
Ö
Ö ÖÖÖ
Ö
1 April 21, 2000
1 page  
HT1622
Pad Description
Pad No. Pad Name I/O
Description
1 CS
Chip selection input with Pull-high resistor. When the CS is logic
high, the data and command read from or written to the HT1622
I
are disabled. The serial interface circuit is also reset. But if CS is
at logic low level and is input to the CS pad, the data and com-
mand transmission between the host controller and the HT1622
are all enabled.
2 RD
READ clock input with Pull-high resistor. Data in the RAM of
I
the HT1622 are clocked out on the rising edge of the RD signal.
The clocked out data will appear on the data line. The host con-
troller can use the next falling edge to latch the clocked out data.
3 WR
WRITE clock input with Pull-high resistor. Data on the DATA
I line are latched into the HT1622 on the rising edge of the WR sig-
nal.
4 DATA
I/O Serial data input/output with Pull-high resistor
5 VSS
¾ Negative power supply, ground
6 OSCI
I
If the system clock comes from an external clock source, the ex-
ternal clock source should be connected to the OSCI pad.
7 VDD
¾ Positive power supply
8 VLCD
I LCD operating voltage input pad
9 IRQ
O
Time base or Watchdog Timer overflow flag, NMOS open drain
output
10, 11 BZ, BZ
O 2kHz or 4kHz tone frequency output pair
12~14 T1~T3
I Not connected
15~22 COM0~COM7 O LCD common outputs
23~54 SEG0~SEG31 O LCD segment outputs
Absolute Maximum Ratings
Supply Voltage..............................-0.3V to 5.5V
Input Voltage ................VSS-0.3V to VDD+0.3V
Storage Temperature.................-50°C to 125°C
Operating Temperature ..............-25°C to 75°C
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maxi-
mum Ratings may cause substantial damage to the device. Functional operation of this de-
vice at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.
5 April 21, 2000
5 Page 
WRITE mode (command code : 1 0 1)
CS
HT1622
WR
D ATA
1 0 1 A5 A4 A3 A2 A1 A0 D0 D1 D2 D3
M e m o r y A d d r e s s 1 ( M A 1 )D a t a ( M A 1 )
1 0 1 A5 A4 A3 A2 A1 A0 D0 D1 D2 D3
M e m o r y A d d r e s s 2 ( M A 2 )D a t a ( M A 2 )
WRITE mode (successive address writing)
CS
WR
D ATA
1 0 1 A5 A4 A3 A2 A1 A0 D0 D1 D2 D3 D0 D1 D2 D3 D0 D1 D2 D3 D0 D1 D2 D3 D0
M e m o ry A d d re s s (M A ) D a ta (M A ) D a ta (M A + 1 ) D a ta (M A + 2 ) D a ta (M A + 3 )
11 April 21, 2000
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet HT1622.PDF ] | |
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