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Teilenummer | ADF4211 |
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Beschreibung | Dual RF/IF PLL Frequency Synthesizers | |
Hersteller | Analog Devices | |
Logo | ||
Gesamt 20 Seiten a Dual RF/IF PLL Frequency Synthesizers
ADF4210/ADF4211/ADF4212/ADF4213
FEATURES
ADF4210: 550 MHz/1.2 GHz
ADF4211: 550 MHz/2.0 GHz
ADF4212: 1.0 GHz/2.7 GHz
ADF4213: 1.0 GHz/3 GHz
2.7 V to 5.5 V Power Supply
Separate Charge Pump Supply (VP) Allows Extended
Tuning Voltage in 3 V Systems
Programmable Dual Modulus Prescaler
RF and IF: 8/9, 16/17, 32/33, 64/65
Programmable Charge Pump Currents
3-Wire Serial Interface
Analog and Digital Lock Detect
Fastlock Mode
Power-Down Mode
GENERAL DESCRIPTION
The ADF4210/ADF4211/ADF4212/ADF4213 is a dual frequency
synthesizer that can be used to implement local oscillators (LO)
in the upconversion and downconversion sections of wireless
receivers and transmitters. They can provide the LO for both
the RF and IF sections. They consist of a low-noise digital PFD
(Phase Frequency Detector), a precision charge pump, a pro-
grammable reference divider, programmable A and B Counters
and a dual-modulus prescaler (P/P + 1). The A (6-bit) and B
(12-bit) counters, in conjunction with the dual modulus prescaler
(P/P + 1), implement an N divider (N = BP + A). In addition,
the 14-bit reference counter (R Counter), allows selectable
REFIN frequencies at the PFD input. A complete PLL (Phase-
Locked Loop) can be implemented if the synthesizer is used with
an external loop filter and VCO (Voltage Controlled Oscillators).
APPLICATIONS
Base Stations for Wireless Radio (GSM, PCS, DCS,
CDMA, WCDMA)
Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)
Control of all the on-chip registers is via a simple 3-wire interface.
The devices operate with a power supply ranging from 2.7 V to
5 V and can be powered down when not in use.
Wireless LANS
Communications Test Equipment
CATV Equipment
FUNCTIONAL BLOCK DIAGRAM
VDD1 VDD2 VP1 VP2
RSET
IFIN
REFIN
CLOCK
DATA
LE
RFIN
IF
PRESCALER
OSCILLATOR
24-BIT
DATA SDOUT
REGISTER
RF
PRESCALER
12-BIT IF
B-COUNTER
8-BIT IF
A-COUNTER
14-BIT IF
R-COUNTER
PHASE
COMPARATOR
REFERENCE
CHARGE
PUMP
CPIF
IF
LOCK
DETECT
IF CURRENT
SETTING
IFCP3 IFCP2 IFCP1
OUTPUT
MUX
MUXOUT
14-BIT RF
R-COUNTER
12-BIT RF
B-COUNTER
6-BIT RF
A-COUNTER
RF
LOCK
DETECT
RFCP3 RFCP2 RFCP1
IF CURRENT
SETTING
PHASE
COMPARATOR
CHARGE
PUMP
REFERENCE
ADF4210/ADF4211/
ADF4212/ADF4213
RSET
FLO SWITCH
CPRF
FLO
REV. A
DGNDRF
AGNDRF DGNDIF DGNDIF
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
AGNDIF
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001
ADF4210/ADF4211/ADF4212/ADF4213–Typical Performance Characteristics
FREQUENCY S11 REAL S11 IMAG FREQUENCY S11 REAL S11 IMAG
50000000.0
150000000.0
250000000.0
350000000.0
450000000.0
550000000.0
650000000.0
750000000.0
850000000.0
950000000.0
1050000000.0
1150000000.0
1250000000.0
1350000000.0
1450000000.0
1550000000.0
1650000000.0
1750000000.0
1850000000.0
1950000000.0
2050000000.0
0.955683
0.956993
0.935463
0.919706
0.871631
0.838141
0.799005
0.749065
0.706770
0.671007
0.630673
0.584013
0.537311
0.505090
0.459446
0.381234
0.363150
0.330545
0.264232
0.242065
0.181238
–0.052267
–0.112191
–0.185212
–0.252576
–0.323799
–0.350455
–0.408344
–0.455840
–0.471011
–0.535268
–0.557699
–0.604256
–0.622297
–0.642019
–0.686409
–0.693908
–0.679602
–0.721812
–0.697386
–0.711716
–0.723232
2150000000.0
2250000000.0
2350000000.0
2450000000.0
2550000000.0
2650000000.0
2750000000.0
2850000000.0
2950000000.0
0.138086
0.102483
0.054916
0.018475
–0.019935
–0.054445
–0.083716
–0.129543
–0.154974
–0.699896
–0.704160
–0.696325
–0.669617
–0.668056
–0.666995
–0.634725
–0.615246
–0.610398
TPC 1. S-Parameter Data for the ADF4213 RF Input
(Up to 3.0 GHz)
0
VDD = 3V
–5 VP = 3V
–10
TA = +85؇C
–15
TA = +25؇C
–20
TA = –40؇C
–25
–30
–35
0
12
RF INPUT FREQUENCY – GHz
3
TPC 4. Input Sensitivity (ADF4213)
0
–10 REFERENCE VDD = 3V, VP = 5V
LEVEL = –5.2dBm
ICP = 5mA
–20 PFD FREQUENCY = 200kHz
–30 LOOP BANDWIDTH = 20kHz
RES. BANDWIDTH = 10Hz
–40 VIDEO BANDWIDTH = 10Hz
–50 SWEEP = 1.9 SECONDS
AVERAGES = 19
–60
–70
–91.2dBc/Hz
–80
–90
–100
–2kHz
–1kHz
900MHz
+1kHz
+2kHz
TPC 2. ADF4213 Phase Noise (900 MHz, 200 kHz, 20 kHz)
10dB/DIVISION
–40
RL = –40dBc/Hz
RMS NOISE = 0.5421؇
–50
0.54؇ rms
–60
–70
–80
–90
–100
–110
–120
–130
–140
100Hz
1kHz
10kHz
100kHz
FREQUENCY OFFSET FROM 900MHz CARRIER
1MHz
TPC 5. ADF4213 Integrated Phase Noise (900 MHz, 200 kHz,
20 kHz, Typical Lock Time: 400 µs)
10dB/DIVISION
–40
RL = –40dBc/Hz
RMS NOISE = 0.6522؇
–50
0.65؇ rms
–60
–70
–80
–90
–100
–110
–120
–130
–140
100Hz
1kHz
10kHz
100kHz
FREQUENCY OFFSET FROM 900MHz CARRIER
1MHz
TPC 3. ADF4213 Integrated Phase Noise (900 MHz,
200 kHz, 35 kHz, Typical Lock Time: 200 µs)
0
–10 REFERENCE VDD = 3V, VP = 5V
LEVEL = –5.7dBm
ICP = 5mA
–20 PFD FREQUENCY = 200kHz
–30 LOOP BANDWIDTH = 20kHz
RES. BANDWIDTH = 1kHz
–40 VIDEO BANDWIDTH = 1kHz
–50 SWEEP = 4.2 SECONDS
AVERAGES = 20
–60
–70
–91.0dBc/Hz
–80
–90
–100
–400kHz –200kHz
900MHz
200kHz
400kHz
TPC 6. ADF4213 Reference Spurs (900 MHz, 200 kHz, 20 kHz)
–6– REV. A
6 Page ADF4210/ADF4211/ADF4212/ADF4213
Table III. IF R Counter Latch Map
IF R COUNTER LATCH
IF CP CURRENT
SETTING
15-BIT REFERENCE COUNTER
CONTROL
BITS
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7
IF IF IF P4
CP2 CP1 CP0
P3
P2
P1 R15 R14 R13 R12 R11 R10 R9
R8 R7 R6
DB6 DB5 DB4 DB3 DB2 DB1 DB0
R5 R4 R3 R2 R1 C2 (0) C1 (0)
R15
R14
R13
..........
R3
R2
R1
DIVIDE RATIO
0
0
0
..........
0
0
1
1
0
0
0
..........
0
1
0
2
0
0
0
..........
0
1
1
3
0
0
0
..........
1
0
0
4
.
.
.
..........
.
.
.
.
.
.
.
..........
.
.
.
.
.
.
.
..........
.
.
.
.
1
1
1
..........
1
0
0
32764
1
1
1
..........
1
0
1
32765
1
1
1
..........
1
1
0
32766
1
1
1
..........
1
1
1
32767
P1 IF PD POLARITY
0 NEGATIVE
1 POSITIVE
P2 CHARGE PUMP OUTPUT
0 NORMAL
1 THREE-STATE
P12 P11
FROM RF R LATCH
P4
P3
MUXOUT
0 0 0 0 LOGIC LOW STATE
0 0 0 1 IF ANALOG LOCK DETECT
0 0 1 0 IF REFERENCE DIVIDER OUTPUT
0 0 1 1 IF N DIVIDER OUTPUT
0 1 0 0 RF ANALOG LOCK DETECT
0 1 0 1 RF/IF ANALOG LOCK DETECT
0 1 1 0 IF DIGITAL LOCK DETECT
0 1 1 1 LOGIC HIGH STATE
1 0 0 0 RF REFERENCE DIVIDER OUTPUT
1 0 0 1 RF N DIVIDER OUTPUT
1 0 1 0 THREE-STATE OUTPUT
1 0 1 1 IF COUNTER RESET
1 1 0 0 RF DIGITAL LOCK DETECT
1 1 0 1 RF/IF DIGITAL LOCK DETECT
1 1 1 0 RF COUNTER RESET
1 1 1 1 IF AND RF COUNTER RESET
IF CP2
0
0
0
0
1
1
1
1
IF CP1
0
0
1
1
0
0
1
1
IF CP0
0
1
0
1
0
1
0
1
1.5k⍀
1.088
2.176
3.264
4.352
5.44
6.528
7.616
8.704
ICP (mA)
2.7k⍀
0.625
1.25
1.875
2.5
3.125
3.75
4.375
5.0
5.6k⍀
0.294
0.588
0.882
1.176
1.47
1.764
2.058
2.352
–12–
REV. A
12 Page | ||
Seiten | Gesamt 20 Seiten | |
PDF Download | [ ADF4211 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
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