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AD9772A Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD9772A
Beschreibung 14-Bit 160 MSPS TxDAC+
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
AD9772A Datasheet, Funktion
FEATURES
Single 3.1 V to 3.5 V supply
14-bit DAC resolution and input data width
160 MSPS input data rate
67.5 MHz reconstruction pass band @ 160 MSPS
74 dBc SFDR @ 25 MHz
2× interpolation filter with high- or low-pass response
73 dB image rejection with 0.005 dB pass-band ripple
Zero-stuffing option for enhanced direct IF performance
Internal 2×/4× clock multiplier
250 mW power dissipation; 13 mW with power-down mode
48-lead LQFP package
APPLICATIONS
Communication transmit channel
W-CDMA base stations, multicarrier base stations,
direct IF synthesis, wideband cable systems
Instrumentation
GENERAL DESCRIPTION
The AD9772A is a single-supply, oversampling, 14-bit digital-
to-analog converter (DAC) optimized for baseband or IF
waveform reconstruction applications requiring exceptional
dynamic range. Manufactured on an advanced CMOS process,
it integrates a complete, low distortion 14-bit DAC with a 2×
digital interpolation filter and clock multiplier. The on-chip PLL
clock multiplier provides all the necessary clocks for the digital
filter and the 14-bit DAC. A flexible differential clock input
allows for a single-ended or differential clock driver for
optimum jitter performance.
For baseband applications, the 2× digital interpolation filter
provides a low-pass response, thus providing as much as a
threefold reduction in the complexity of the analog reconstruc-
tion filter. It does so by multiplying the input data rate by a
factor of 2 while suppressing the original upper in-band image
by more than 73 dB. For direct IF applications, the 2× digital
interpolation filter response can be reconfigured to select the
upper in-band image (that is, the high-pass response) while
suppressing the original baseband image. To increase the signal
level of the higher IF images and their pass-band flatness in
direct IF applications, the AD9772A also features a zero-stuffing
option in which the data following the 2× interpolation filter is
upsampled by a factor of 2 by inserting midscale data samples.
14-Bit, 160 MSPS TxDAC+
with 2× Interpolation Filter
AD9772A
FUNCTIONAL BLOCK DIAGRAM
CLKCOM CLKVDD MOD0 MOD1 RESET PLLLOCK DIV0 DIV1
CLK+
CLK–
AD9772A
CLOCK DISTRIBUTION
AND MODE SELECT
PLL CLOCK
MULTIPLIER
1×/2×
FILTER
CONTROL
MUX
CONTROL
2×/4×
PLLCOM
LPF
PLLVDD
DATA
INPUTS
(DB13 TO
DB0)
SLEEP
EDGE-
TRIGGERED
LATCHES
2× FIR
INTER-
POLATION
FILTER
ZERO-
STUFF
MUX
14-BIT DAC
1.2V REFERENCE
AND CONTROL AMP
IOUTA
IOUTB
REFIO
FSADJ
DCOM DVDD
ACOM AVDD
Figure 1.
REFLO
The AD9772A can reconstruct full-scale waveforms with band-
widths of up to 67.5 MHz while operating at an input data rate
of 160 MSPS. The 14-bit DAC provides differential current
outputs to support differential or single-ended applications.
A segmented current source architecture is combined with a
proprietary switching technique to reduce spurious components
and enhance dynamic performance. Matching between the two
current outputs ensures enhanced dynamic performance in a
differential output configuration. The differential current
outputs can be fed into a transformer or a differential op amp
topology to obtain a single-ended output voltage using an
appropriate resistive load.
The on-chip band gap reference and control amplifier are con-
figured for maximum accuracy and flexibility. The AD9772A
can be driven by the on-chip reference or by a variety of
external reference voltages. The full-scale current of the
AD9772A can be adjusted over a 2 mA to 20 mA range, thus
providing additional gain-ranging capabilities.
The AD9772A is available in a 48-lead LQFP package and is
specified for operation over the industrial temperature range of
–40°C to +85°C.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.






AD9772A Datasheet, Funktion
Parameter
CLKVDD (PLLVDD = 0 V)
Voltage Range
Clock Supply Current (ICLKVDD)
Nominal Power Dissipation5
Power Supply Rejection Ratio (PSRR)6
PSRR − AVDD
PSRR − DVDD
OPERATING RANGE
Min
3.1
−0.6
−0.025
−40
1 Measured at IOUTA driving a virtual ground.
2 Nominal full-scale current, IOUTFS, is 32× the IREF current.
3 Use an external amplifier to drive any external load.
4 Measured at fDATA = 100 MSPS and fOUT = 1 MHz with DIV1 and DIV0 = 0 V.
5 Measured with PLL enabled at fDATA = 50 MSPS and fOUT = 1 MHz.
6 Measured over a 3.0 V to 3.6 V range.
Typ Max
3.3 3.5
6.0
253 272
+0.6
+0.025
+85
AD9772A
Unit
V
mA
mW
% of FSR/V
% of FSR/V
°C
Rev. C | Page 5 of 40

6 Page









AD9772A pdf, datenblatt
Pin No.
39
40
42
43
45, 46
AD9772A
Mnemonic
REFIO
FSADJ
IOUTBB
IOUTA
AVDD
Description
Reference Input/Output. This pin serves as the reference input when the internal reference is disabled (that
is, when REFLO is tied to AVDD), or it serves as the 1.2 V reference output when the internal reference is
activated (that is, when REFLO is tied to ACOM). If the internal reference is activated, a 0.1 μ F capacitor to
ACOM is required.
Full-Scale Current Output Adjust.
Complementary DAC Current Output. Full-scale current is selected when all data bits are 0s.
DAC Current Output. Full-scale current is selected when all data bits are 1s.
Analog Supply Voltage (3.1 V to 3.5 V).
Rev. C | Page 11 of 40

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