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PDF AD5641 Data sheet ( Hoja de datos )
| Número de pieza | AD5641 | |
| Descripción | 2.7 V to 5.5 V/ <100 uA/ 14-Bit nanoDAC D/A in SC70 Package | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD5641 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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Preliminary Technical Data
FEATURES
6-lead SC70 package
Power-down to <100 nA @ 3 V
Single 14-bit DAC:
B Version: ±4 LSB INL
A Version: ±8 LSB INL
Micropower operation: max 100 µA @ 5 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to 0 V with brownout detection
3 power-down functions
Low power serial interface with Schmitt-triggered inputs
On-chip output buffer amplifier, rail-to-rail operation
SYNC interrupt facility
APPLICATIONS
Voltage level setting
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5641, a member of the nanoDAC family, is a single,
14-bit, buffered, voltage out DAC that operates from a single
2.7 V to 5.5 V supply, consuming <100 µA at 5 V. The part
comes in a tiny SC70 package. Its on-chip precision output
amplifier allows rail-to-rail output swing to be achieved. The
AD5641 utilizes a versatile 3-wire serial interface that operates
at clock rates up to 30 MHz and is compatible with SPI®, QSPI™,
MICROWIRE™, and DSP interface standards. The reference for
AD5641 is derived from the power supply inputs and, therefore,
gives the widest dynamic output range. The part incorporates a
power-on reset circuit, which ensures that the DAC output
powers up to 0 V and remains there until a valid write to the
device takes place.
The AD5641 contains a power-down feature that reduces
current consumption to <100 nA at 3 V, and provides software-
selectable output loads while in power-down mode. The part is
put into power-down mode over the serial interface. The low
power consumption of the part in normal operation makes it
ideally suited to portable battery-operated equipment. The
combination of small package and low power makes this
nanoDAC device ideal for level-setting requirements such as
generating bias or control voltages in space-constrained and
power-sensitive applications.
Rev. PrC
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
2.7 V to 5.5 V, <100 µA, 14-Bit
nanoDAC™ D/A in SC70 Package
AD5641
FUNCTIONAL BLOCK DIAGRAM
VDD GND
POWER-ON
RESET
AD5641
DAC
REGISTER
REF(+)
14-BIT
DAC
OUTPUT
BUFFER
VOUT
INPUT
CONTROL
LOGIC
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
SYNC SCLK DIN
Figure 1.
Table 1. Related Devices
Part Number
Description
AD5601/AD5611/AD5621 2.7 V to 5.5 V, <100 µA, 8-/10-/12-Bit,
nanoDAC™ D/A, SPI Interface, SC70
Package
The AD5641 is designed with new technology and comes in a
space-saving SC70 package.
PRODUCT HIGHLIGHTS
1. Available in a space-saving 6-lead SC70 package.
2. Low power, single-supply operation. The AD5641 operates
from a single 2.7 V to 5.5 V supply and typically consumes
0.2 mW at 3 V and 0.5 mW at 5 V, making it ideal for
battery-powered applications.
3. The on-chip output buffer amplifier allows the output of
the DAC to swing rail-to-rail with a typical slew rate of
0.5 V/µs.
4. Reference derived from the power supply.
5. High speed serial interface with clock speeds up to
30 MHz.
6. Designed for very low power consumption. The interface
powers up only during a write cycle.
7. Power-down capability. When powered down, the DAC
typically consumes <100 nA at 3 V.
8. Power-on reset with brownout detection.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter
VDD to GND
Digital Input Voltage to GND
VOUT to GND
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Maximum Junction Temperature
SC70 Package
θJA Thermal Impedance
θJC Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 s)
Infrared (15 s)
ESD
Rating
−0.3 V to +7.0 V
–0.3 V to VDD + 0.3 V
–0.3 V to VDD + 0.3 V
–40°C to +125°C
–65°C to +160°C
150°C
332°C/W
120°C/W
215°C
220°C
2.0 kV
AD5641
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrC | Page 5 of 20
5 Page 
Preliminary Technical Data
140
120
3/4 SCALE
100
80
FULL SCALE
1/4 SCALE
MIDSCALE
60
ZERO SCALE
40
20
0
0 5 10 15 20 25
FREQUENCY (MHz)
Figure 22. IDD vs. SCLK vs. Code
AD5641
200
180 NOISE SPECTRAL
DENSITY
160
CODE 0x2040
140
120 MIDSCALE
100
FULL SCALE
80
60
ZERO SCALE
40
20
0
1K 10K
FREQUENCY
Figure 23. Noise Spectral Density
100K
Rev. PrC | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet AD5641.PDF ] | |
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