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AD5241 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD5241
Beschreibung 2-Channel/ 256-Position Digital Potentiometer
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
AD5241 Datasheet, Funktion
I2C-Compatible,
256-Position Digital Potentiometers
AD5241/AD5242
FEATURES
256 positions
10 kΩ, 100 kΩ, 1 MΩ
Low temperature coefficient: 30 ppm/°C
Internal power on midscale preset
Single-supply 2.7 V to 5.5 V or dual-supply ±2.7 V for ac or
bipolar operation
I2C-compatible interface with readback capability
Extra programmable logic outputs
Self-contained shutdown feature
Extended temperature range: −40°C to +105°C
APPLICATIONS
Multimedia, video, and audio
Communications
Mechanical potentiometer replacement
Instrumentation: gain, offset adjustment
Programmable voltage-to-current conversion
Line impedance matching
FUNCTIONAL BLOCK DIAGRAM
A1 W1 B1
O1 O2
SHDN
VDD
RDAC
REGISTER 1
REGISTER 2
VSS
ADDR
DECODE
AD5241
8
SDA
SCL
GND
SERIAL INPUT REGISTER
PWR-ON
RESET
AD0 AD1
Figure 1. AD5241 Functional Block Diagram
A1 W1 B1
A2 W2 B2
O1 O2
SHDN
REGISTER
VDD
RDAC
RDAC
REGISTER 1
REGISTER 2
VSS
SDA
SCL
GND
ADDR
DECODE
1
AD5242
8
SERIAL INPUT REGISTER
PWR-ON
RESET
AD0 AD1
Figure 2. AD5242 Functional Block Diagram
GENERAL DESCRIPTION
The AD5241/AD5242 provide a single-/dual-channel, 256-
position, digitally controlled variable resistor (VR) device. These
devices perform the same electronic adjustment function as a
potentiometer, trimmer, or variable resistor. Each VR offers a
completely programmable value of resistance between the A
terminal and the wiper, or the B terminal and the wiper. For the
AD5242, the fixed A-to-B terminal resistance of 10 kΩ, 100 kΩ,
or 1 MΩ has a 1% channel-to-channel matching tolerance. The
nominal temperature coefficient of both parts is 30 ppm/°C.
Wiper position programming defaults to midscale at system
power on. When powered, the VR wiper position is programmed
by an I2C®-compatible, 2-wire serial data interface. Both parts
have two extra programmable logic outputs available that
enable users to drive digital loads, logic gates, LED drivers, and
analog switches in their system.
The AD5241/AD5242 are available in surface-mount, 14-lead
SOIC and 16-lead SOIC packages and, for ultracompact solutions,
14-lead TSSOP and 16-lead TSSOP packages. All parts are
guaranteed to operate over the extended temperature range of
−40°C to +105°C.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2001–2009 Analog Devices, Inc. All rights reserved.






AD5241 Datasheet, Funktion
AD5241/AD5242
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VDD to GND
VSS to GND
VDD to VSS
VA, VB, VW to GND
IA, IB, IW
RAB = 10 kΩ in TSSOP-14
RAB = 100 kΩ in TSSOP-14
RAB = 1 MΩ in TSSOP-14
Digital Input Voltage to GND
Operating Temperature Range
Thermal Resistance θJA
14-Lead SOIC
16-Lead SOIC
14-Lead TSSOP
16-Lead TSSOP
Maximum Junction Temperature (TJ max)
Package Power Dissipation
Storage Temperature Range
Lead Temperature
Vapor Phase, 60 sec
Infrared, 15 sec
Rating
−0.3 V to +7 V
0 V to −7 V
7V
VSS to VDD
5.0 mA1
1.5 mA1
0.5 mA1
0 V to VDD + 0.3 V
−40°C to +105°C
158°C/W
73°C/W
206°C/W
180°C/W
150°C
PD = (TJ max − TA)/θJA
−65°C to +150°C
215°C
220°C
1 Maximum current increases at lower resistance and different packages.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. C | Page 6 of 20

6 Page









AD5241 pdf, datenblatt
AD5241/AD5242
THEORY OF OPERATION
The AD5241/AD5242 provide a single-/dual-channel, 256-
position digitally controlled variable resistor (VR) device. The
terms VR, RDAC, and programmable resistor are commonly
used interchangeably to refer to digital potentiometer.
To program the VR settings, refer to the Digital Interface section.
Both parts have an internal power-on preset that places the wiper
in midscale during power-on that simplifies the fault condition
recovery at power-up. In addition, the shutdown pin (SHDN)
of AD5241/AD5242 places the RDAC in an almost zero power
consumption state where Terminal A is open circuited and Wiper
W is connected to Terminal B, resulting in only leakage current
being consumed in the VR structure. During shutdown, the VR
latch contents are maintained when the RDAC is inactive. When
the part returns from shutdown, the stored VR setting is applied
to the RDAC.
A
SHDN
SWSHDN
D7
D6
R SW 2N–1
D5
D4
D3
D2
R
SW
N
2–2
D1
D0
W
R SW1
RDAC
LATCH
R RAB/2N
AND
DECODER
R
SW0
DIGITAL CIRCUITRY
B OMITTED FOR CLARITY
Figure 31. Equivalent RDAC Circuit
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The nominal resistance of the RDAC between Terminal A and
Terminal B is available in 10 kΩ, 100 kΩ, and 1 MΩ. The final two
or three digits of the part number determine the nominal resistance
value, for example, 10 kΩ = 10, 100 kΩ = 100, and 1 MΩ = 1 M.
The nominal resistance (RAB) of the VR has 256 contact points
accessed by the wiper terminal, plus the B terminal contact. The
8-bit data in the RDAC latch is decoded to select one of the 256
possible settings. Assume a 10 kΩ part is used; the first connection
of the wiper starts at the B terminal for Data 0x00. Because there is
a 60 Ω wiper contact resistance, such connection yields a minimum
of 60 Ω resistance between Terminal W and Terminal B. The
second connection is the first tap point that corresponds to 99 Ω
(RWB = RAB/256 + RW = 39 + 60) for Data 0x01. The third connection
is the next tap point representing 138 Ω (39 × 2 + 60) for Data 0x02,
and so on. Each LSB data value increase moves the wiper up the
resistor ladder until the last tap point is reached at 10,021 Ω
[RAB – 1 LSB + RW].
Figure 31 shows a simplified diagram of the equivalent RDAC
circuit where the last resistor string is not accessed; therefore,
there is 1 LSB less of the nominal resistance at full scale in
addition to the wiper resistance.
The general equation determining the digitally programmed
resistance between W and B is
RWB(D) = D × RAB + RW
256
(1)
where:
D is the decimal equivalent of the binary code between 0 and 255,
which is loaded in the 8-bit RDAC register.
RAB is the nominal end-to-end resistance.
RW is the wiper resistance contributed by the on resistance of
the internal switch.
Again, if RAB = 10 kΩ, Terminal A can be either open circuit or
tied to W. Table 6 shows the RWB resistance based on the code
set in the RDAC latch.
Table 6. RWB (D) at Selected Codes for RAB = 10 kΩ
D (DEC) RWB (Ω) Output State
255 10021 Full-scale (RWB – 1 LSB + RW)
128 5060 Midscale
1 99 1 LSB
0 60 Zero-scale (wiper contact resistance)
Note that in the zero-scale condition, a finite wiper resistance of
60 Ω is present. Care should be taken to limit the current flow
between W and B in this state to a maximum current of no more
than 20 mA. Otherwise, degradation or possible destruction of
the internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between Wiper W and Terminal A also produces a
digitally controlled resistance, RWA. When these terminals are
used, Terminal B can be opened or tied to the wiper terminal.
The minimum RWA resistance is for Data 0xFF and increases as
the data loaded in the latch decreases in value. The general
equation for this operation is
RWA(D) = 256 D × RAB + RW
256
(2)
For RAB = 10 kΩ, Terminal B can be either open circuit or tied
to W. Table 7 shows the RWA resistance based on the code set in
the RDAC latch.
Table 7. RWA (D) at Selected Codes for RAB = 10 kΩ
D (DEC)
RWA (Ω)
Output State
255 99
Full-scale
128 5060 Midscale
1
10021
1 LSB
0
10060
Zero-scale
Rev. C | Page 12 of 20

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