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AD7237A Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD7237A
Beschreibung LC2MOS Dual 12-Bit DACPORTs
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
AD7237A Datasheet, Funktion
a
FEATURES
Complete Dual 12-Bit DAC Comprising
Two 12-Bit CMOS DACs
On-Chip Voltage Reference
Output Amplifiers
Reference Buffer Amplifiers
Improved AD7237/AD7247:
12 V to 15 V Operation
Faster Interface –30 ns typ Data Setup Time
Parallel Loading Structure: AD7247A
(8+4) Loading Structure: AD7237A
Single or Dual Supply Operation
Low Power—165 mW typ in Single Supply
LC2MOS
Dual 12-Bit DACPORTs
AD7237A/AD7247A
FUNCTIONAL BLOCK DIAGRAMS
GENERAL DESCRIPTION
The AD7237A/AD7247A is an enhanced version of the industry
standard AD7237/AD7247. Improvements include operation
from 12 V to 15 V supplies, faster interface times and better
reference variations with VDD. Additional features include faster
settling times.
The AD7237A/AD7247A is a complete, dual, 12-bit, voltage
output digital-to-analog converter with output amplifiers and
Zener voltage reference on a monolithic CMOS chip. No exter-
nal user trims are required to achieve full specified performance.
Both parts are microprocessor compatible, with high speed data
latches and interface logic. The AD7247A accepts 12-bit paral-
lel data which is loaded into the respective DAC latch using the
WR input and a separate Chip Select input for each DAC. The
AD7237A has a double buffered interface structure and an 8-bit
wide data bus with data loaded to the respective input latch in
two write operations. An asynchronous LDAC signal on the
AD7237A updates the DAC latches and analog outputs.
A REF OUT/REF IN function is provided which allows either
the on-chip 5 V reference or an external reference to be used as
a reference voltage for the part. For single supply operation, two
output ranges of 0 V to +5 V and 0 V to +10 V are available,
while these two ranges plus an additional ± 5 V range are avail-
able with dual supplies. The output amplifiers are capable of de-
veloping +10 V across a 2 kload to GND.
The AD7237A/AD7247A is fabricated in Linear Compatible
CMOS (LC2MOS), an advanced, mixed technology process
that combines precision bipolar circuits with low power CMOS
logic. Both parts are available in a 24-pin, 0.3" wide plastic and
hermetic dual-in-line package (DIP) and are also packaged in a
24-lead small outline (SOIC) package.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
PRODUCT HIGHLIGHTS
1. The AD7237A/AD7247A is a dual 12-bit DACPORT® on a
single chip. This single chip design and small package size
offer considerable space saving and increased reliability over
multichip designs.
2. The improved interface times of the parts allow easy, direct
interfacing to most modern microprocessors, whether they
have 8-bit or 16-bit data bus structures.
3. The AD7237A/AD7247A features a wide power supply
range allowing operation from 12 V supplies.
DACPORT is a registered trademark of Analog Devices, Inc.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703






AD7237A Datasheet, Funktion
AD7237A/AD7247A
TERMINOLOGY
RELATIVE ACCURACY (LINEARITY)
Relative Accuracy, or endpoint linearity, is a measure of the
maximum deviation of the DAC transfer function from a
straight line passing through the endpoints of the transfer func-
tion. It is measured after allowing for zero and full-scale errors
and is expressed in LSBs or as a percentage of full-scale reading.
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ± 1 LSB or less
over the operating temperature range ensures monotonicity.
SINGLE SUPPLY LINEARITY AND GAIN ERROR
The output amplifiers of the AD7237A/AD7247A can have true
negative offsets even when the part is operated from a single
+12 V to +15 V supply. However, because the negative supply
rail (VSS) is 0 V, the output cannot actually go negative. Instead,
when the output offset voltage is negative, the output voltage
sits at 0 V, resulting in the transfer function shown in Figure 1.
This “knee” is an offset effect, not a linearity error, and the
transfer function would have followed the dotted line if the out-
put voltage could have gone negative.
Normally, linearity is measured between zero (all 0s input code)
and full scale (all 1s input code) after offset and full scale have
been adjusted out or allowed for, but this is not possible in
single supply operation if the offset is negative, due to the knee
in the transfer function. Instead, linearity of the AD7237A/
AD7247A in the unipolar mode is measured between full scale
and the lowest code which is guaranteed to produce a positive
output voltage. This code is calculated from the maximum
specification for negative offset, i.e., linearity is measured be-
tween Codes 3 and 4095.
UNIPOLAR OFFSET ERROR
Unipolar Offset Error is the measured output voltage from
VOUTA or VOUTB with all zeros loaded into the DAC latches
when the DACs are configured for unipolar output. It is a com-
bination of the offset errors of the DAC and output amplifier.
BIPOLAR ZERO ERROR
Bipolar Zero Error is the voltage measured at VOUTA or VOUTB
when the DAC is connected in the bipolar mode and loaded
with code 2048. It is due to a combination of offset errors in the
DAC, amplifier offset and mismatch in the application resistors
around the amplifier.
FULL-SCALE ERROR
Full-Scale Error is a measure of the output error when the
amplifier output is at full scale (for the bipolar output range full
scale is either positive or negative full scale). It is measured with
respect to the reference input voltage and includes the offset
errors.
DIGITAL FEEDTHROUGH
Digital Feedthrough is the glitch impulse injected for the digital
inputs to the analog output when the data inputs change state,
but the data in the DAC latches is not changed.
For the AD7237A it is measured with LDAC held high. For the
AD7247A it is measured with CSA and CSB held high.
DIGITAL CROSSTALK
Digital crosstalk is the glitch impulse transferred to the output
of one converter due to a change in digital code to the DAC
latch of the other converter. It is specified in nV secs.
Figure 1. Effect of Negative Offset (Single Supply)
DIGITAL-TO-ANALOG GLITCH IMPULSE
This is the voltage spike that appears at the output of the DAC
when the digital code changes before the output settles to its fi-
nal value. The energy in the glitch is specified in nV secs and is
measured for a 1 LSB change around the major carry transition
(0111 1111 1111 to 1000 0000 0000).
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AD7237A pdf, datenblatt
AD7237A/AD7247A
Either high byte or low byte data can be written first to the in-
put latch. A write to the AD7237A DAC Latch address transfers
the data from the input latches to the respective DAC latches
and updates both analog outputs. Alternatively, the LDAC in-
put can be asynchronous or can be common to a number of
AD7237As for simultaneous updating of a number of voltage
channels.
AD7237A—68008 Interface
An interface between the AD7237A and the 68008 is shown in
Figure 14. In the diagram shown, the LDAC is derived from an
asynchronous LDAC signal, but this can be derived from the
address decoder as in the previous interface diagram.
OUTLINE DIMENSIONS
Dimensions shown in inchcs and (mm).
Plastic DIP (N-24)
Cerdip (Q-24)
Figure 14. AD7237A to 68008 Interface
AD7237A—6502/6809 Interface
Figure 15 shows an interface between the AD7237A and the
6502 or 6809 microprocessor. The procedure for writing data to
the AD7237A is as outlined for the 8085A/8088 interface. For
the 6502 microprocessor, the 2 clock is used to generate the
WR, while for the 6809 the E signal is used.
SOIC (R-24)
Figure 15. AD7237A to 6502/6809 Interface
–12–
REV. 0

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