PDF AD721 Data sheet ( Hoja de datos )

Número de pieza	AD721
Descripción	RGB to NTSC/PAL Encoders
Fabricantes	Analog Devices
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No Preview Available ! a RGB to NTSC/PAL Encoders AD720/AD721 FEATURES Composite Video Output Chrominance and Luminance (S-Video) Outputs No External Filters or Delay Lines Required Drives 75 Ω Reverse-Terminated Loads Compact 28-Pin PLCC Logic Selectable NTSC or PAL Encoding Modes Automatically Selects Proper Chrominance Filter Cutoff Frequency for Encoding Standard Logic Selectable Encode or Power-Down Mode (AD720 Only) Logic Selectable Encode or Bypass Mode (AD721 Only) Low Power: 200 mW typical APPLICATIONS RGB to NTSC or PAL Encoding Drive RGB Signals into 75 Ω Load (AD721 Only) PRODUCT DESCRIPTION The AD720 and AD721 RGB to NTSC/PAL Encoders convert red, green and blue color component signals into their corre- sponding luminance (baseband amplitude) and chrominance (subcarrier amplitude and phase) signals in accordance with either NTSC or PAL standards. These two outputs are also combined to provide a composite video output. All three out- puts are available separately at voltages of twice the standard signal levels as required for driving 75 Ω reverse terminated cables. The AD721 also features a bypass mode, in which the RGB inputs may bypass the encoder section of the IC via three gain-of-two amplifiers suitable for driving 75 Ω reverse termi- nated cables. The AD720 and AD721 provide a complete, fully calibrated function, requiring only termination resistors, bypass capacitors, a clock input at four times the subcarrier frequency, and a com- posite sync pulse. There are two control inputs: one input selects the TV standard (NTSC/PAL) and the other (ENCD) powers down most sections of the chip when the encoding func- tion is not in use (AD720) or activates the triple bypass buffer to drive the RGB signals when RGB encoding is not required (AD721). All logical inputs are CMOS compatible. The chip operates from ± 5 V supplies. (continued on page 5) FUNCTIONAL BLOCK DIAGRAM NTSC/PAL ASNC C-SYNC 4FSC ENCD RED GREEN BLUE SYNC DECODER C-SYNC DELAY NTSC/PAL BURST DELAYED C-SYNC POWER AND GROUNDS +5V LOGIC +5V ANALOG QUADRATURE DECODER BURST SC 90° SC 0° ±180° (PAL ONLY) SC 90°/270° NTSC/PAL CLOCK AT 8FSC –5V AGND DGND ANALOG ONLY ANALOG LOGIC Y 5MHz 4-POLE LP PRE-FILTER RGB-TO-YUV ENCODING MATRIX U V 1.2MHz 4-POLE LPF 1.2MHz 4-POLE LPF SAMPLED- DATA DELAY LINE DC RESTORE AND C-SYNC INSERTION 5MHz 2-POLE LP POST- FILTER X2 NTSC/PAL ∑ X2 ∑BALANCED MODULATORS 3.6MHz (NTSC) 4.4MHz (PAL) 3-POLE LPF X2 LUMINANCE OUTPUT* –0.572V TO 1.43V NTSC –0.6V TO 1.4V PAL COMPOSITE OUTPUT* –0.572V TO 2V NTSC –0.6V TO 2V PAL CHROMINANCE OUTPUT* 572mVp-p NTSC 600mVp-p PAL X2 ROUT 1.5Vp-p AD721 (ONLY) X2 GOUT 1.5Vp-p X2 BOUT 1.5Vp-p NOTE: THE LUMINANCE, COMPOSITE, AND CHROMINANCE OUTPUTS ARE AT TWICE NORMAL LEVELS FOR DRIVING 75Ω REVERSE-TERMINATED LINES. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 1 page AD720/AD721 (continued from page 1) All required low-pass filters are on chip. After the input signals pass through a precision RGB to YUV encoding matrix, two on- chip low-pass filters limit the bandwidth of the U and V color difference signals to 1.2 MHz prior to quadrature modulation of the color subcarrier; a third low-pass filter at 3.6 MHz (NTSC) or 4.4 MHz (PAL) follows the modulators to limit the harmonic content of the output. Delays in the U and V chroma filters are matched by an on-chip sampled data delay line in the Y signal path; to prevent aliasing, prefilter at 5 MHz is included ahead of the delay line and a post filter at 5 MHz is added after the delay line to suppress harmon- ics in the output. These low-pass filters are optimized for mini- mum pulse overshoot. The overall delay is about 170 ns, which precompensates for delays in the filters used to decode the NTSC or PAL signal in a television receiver. (This precompen- sation delay is already present in TV broadcasts.) The AD720 and AD721 are available in a 28-pin plastic leaded chip carrier for the 0°C to +70°C commercial temperature range. THEORY OF OPERATION Referring to the AD720/AD721 block diagram (Figure 8), the RGB inputs (each 0 mV to 714 mV in NTSC or 0 mV to 700 mV in PAL) are first encoded into luminance and color difference signals. The luminance signal is called the “Y” signal and the color-difference signals are called U and V. The RGB inputs are encoded into the YUV format using the transformation Y = 0.299R + 0.587G + 0.114B U = 0.493 (B-Y) V = 0.877 (R-Y) For NTSC operation, the chroma amplitude is increased by the factor 1.06 prior to summation with the luminance output. The burst signal is inserted into the Y channel in the encoding matrix. The three outputs of the encoding matrix, now transformed into Y, U, and V components, take two paths. The Y (luminance) signal is passed through a delay line consisting of a prefilter, a sampled-data delay line, and a post filter. The pre- and post-filters prevent aliasing of harmonics back into the baseband video. The overall de- lay is a nominal –170 ns relative to the chrominance signal, in keeping with broadcast requirements to compensate for delays in- troduced by the filters in the decoding process. The U and V components pass through 4-pole modified Bessel low-pass filters with a 1.2 MHz –3 dB frequency to prevent aliasing in the balanced modulators, where they modulate a 3.579 545 000 MHz (NTSC) or 4.433 618 750 MHz (PAL) signal via a pair of balanced modulators driven in quadrature by the color subcarrier. The AD720/AD721 4FSC input drives a digital divide-by-4 cir- cuit (two flip-flops) to create the quadrature signal. The refer- ence phase 0° is used for the U signal. In the NTSC mode, the V signal is modulated at 90°, but in the PAL mode, the V modulation input alternates between 90° and 270° at half the line rate as required by the PAL standard. The outputs of the balanced modulators are summed and low-pass filtered to re- move harmonics. NTSC/PAL ASNC C-SYNC 4FSC ENCD RED GREEN BLUE SYNC DECODER C-SYNC DELAY NTSC/PAL BURST DELAYED C-SYNC POWER AND GROUNDS +5V LOGIC +5V ANALOG QUADRATURE DECODER BURST SC 90° SC 0° ±180° (PAL ONLY) SC 90°/270° NTSC/PAL CLOCK AT 8FSC –5V AGND DGND ANALOG ONLY ANALOG LOGIC Y 5MHz 4-POLE LP PRE-FILTER RGB-TO-YUV ENCODING MATRIX U 1.2MHz 4-POLE LPF V 1.2MHz 4-POLE LPF SAMPLED- DATA DELAY LINE DC RESTORE AND C-SYNC INSERTION 5MHz 2-POLE LP POST- FILTER X2 NTSC/PAL ∑ X2 ∑BALANCED MODULATORS 3.6MHz (NTSC) 4.4MHz (PAL) 3-POLE LPF X2 LUMINANCE OUTPUT –0.572V TO 1.43V NTSC –0.6V TO 1.4V PAL COMPOSITE OUTPUT* –0.572V TO 2V NTSC –0.6V TO 2V PAL CHROMINANCE OUTPUT* 572mVp-p NTSC 600mVp-p PAL X2 ROUT 1.5Vp-p AD721 (ONLY) X2 GOUT 1.5Vp-p X2 BOUT 1.5Vp-p *NOTE: THE LUMINANCE, COMPOSITE, AND CHROMINANCE OUTPUTS ARE AT TWICE NORMAL LEVELS FOR DRIVING 75Ω REVERSE-TERMINATED LINES. Figure 8. AD720/AD721 Functional Block Diagram REV. 0 –5– 5 Page

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