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PDF AD847 Data sheet ( Hoja de datos )

Número de pieza AD847
Descripción High Speed/ Low Power Monolithic Op Amp
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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No Preview Available ! AD847 Hoja de datos, Descripción, Manual

a
FEATURES
Superior Performance
High Unity Gain BW: 50 MHz
Low Supply Current: 5.3 mA
High Slew Rate: 300 V/s
Excellent Video Specifications
0.04% Differential Gain (NTSC and PAL)
0.19؇ Differential Phase (NTSC and PAL)
Drives Any Capacitive Load
Fast Settling Time to 0.1% (10 V Step): 65 ns
Excellent DC Performance
High Open-Loop Gain 5.5 V/mV (RLOAD = 1 k)
Low Input Offset Voltage: 0.5 mV
Specified for ؎5 V and ؎15 V Operation
Available in a Wide Variety of Options
Plastic DIP and SOIC Packages
Cerdip Package
Die Form
MIL-STD-883B Processing
Tape & Reel (EIA-481A Standard)
Dual Version Available: AD827 (8 Lead)
Enhanced Replacement for LM6361
Replacement for HA2544, HA2520/2/5 and EL2020
APPLICATIONS
Video Instrumentation
Imaging Equipment
Copiers, Fax, Scanners, Cameras
High Speed Cable Driver
High Speed DAC and Flash ADC Buffers
PRODUCT DESCRIPTION
The AD847 represents a breakthrough in high speed amplifiers
offering superior ac & dc performance and low power, all at low
cost. The excellent dc performance is demonstrated by its ± 5 V
6
High Speed, Low Power
Monolithic Op Amp
AD847
CONNECTION DIAGRAM
Plastic DIP (N),
Small Outline (R) and
Cerdip (Q) Packages
specifications which include an open-loop gain of 3500 V/V
(500 load) and low input offset voltage of 0.5 mV. Common-
mode rejection is a minimum of 78 dB. Output voltage swing is
± 3 V into loads as low as 150 . Analog Devices also offers
over 30 other high speed amplifiers from the low noise AD829
(1.7 nV/Hz) to the ultimate video amplifier, the AD811, which
features 0.01% differential gain and 0.01° differential phase.
APPLICATION HIGHLIGHTS
1. As a buffer the AD847 offers a full-power bandwidth of
12.7 MHz (5 V p-p with ± 5 V supplies) making it outstand-
ing as an input buffer for flash A/D converters.
2. The low power and small outline package of the AD847
make it very well suited for high density applications such as
multiple pole active filters.
3. The AD847 is internally compensated for unity gain opera-
tion and remains stable when driving any capacitive load.
5.5
5
4.5
4
0 5 10 15 20
SUPPLY VOLTAGE – ± Volts
Quiescent Current vs. Supply Voltage
REV. F
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
AD847 Driving Capacitive Loads
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703

1 page




AD847 pdf
Typical Characteristics (@ +25؇C and VS = ؎15 V, unless otherwise noted)
20 20
AD847
15
+VIN
10
–VIN
5
0
0 5 10 15 20
SUPPLY VOLTAGE – ± Volts
Figure 1. Input Common-Mode Range vs. Supply Voltage
30
25
20
±15 V SUPPLIES
15
10
±5V SUPPLIES
5
0
10
100 1k
LOAD RESISTANCE –
10k
Figure 3. Output Voltage Swing vs. Load Resistance
5
15
+VOUT
10
–VOUT
5
RLOAD = 500
0
0 5 10 15 20
SUPPLY VOLTAGE – ± Volts
Figure 2. Output Voltage Swing vs. Supply Voltage
6
5.5
5
4.5
4
0 5 10 15 20
SUPPLY VOLTAGE – ± Volts
Figure 4. Quiescent Current vs. Supply Voltage
100
4
VS = ± 5V
3
2
–60 –40 –20 0
20 40 60 80 100 120 140
TEMPERATURE – °C
Figure 5. Input Bias Current vs. Temperature
10
1
0.1
0.01
10k
100k
1M 10M
FREQUENCY – Hz
100M
Figure 6. Output Impedance vs. Frequency
REV. F
–5–

5 Page





AD847 arduino
AD847
A High Speed, Three Op-Amp In-Amp
The circuit of Figure 26 lends itself well to CCD imaging and
other video speed applications. It uses two high speed CB pro-
cess op-amps: Amplifier A3, the output amplifier, is an AD847.
The input amplifier (A1 and A2) is an AD827, which is a dual
version of the AD847. This circuit has the optional flexibility of
both dc and ac trims for common-mode rejection, plus the abil-
ity to adjust for minimum settling time.
+15V
COMM
–15V
10µF
10µF
+VS
0.1µF
0.1µF
–VS
EACH
AMPLIFIER
1µF
0.1µF
PIN 7 AD847,
PIN 8 AD827
1µF 0.1µF
PIN 4
AD847 & AD827
–VIN
+VIN
1/2
AD827
3
A1 1
2
1k
2k
RG
1k
2k
6
A2 7
5 1/2
AD827
5pF
2–8pF
SETTLING TIME
AC CMR ADJUST
2k
2
A3
6
3
AD847
1.87k
VOUT
RL
2k
INPUT
FREQUENCY
100Hz
1kHz
10kHz
100kHz
1MHz
CMRR
88.3dB
87.4dB
86.2dB
67.4dB
47.1dB
DC CMR
ADJUST
200
CIRCUIT GAIN = 2000+ 1
RG
BANDWIDTH, SETTLING TIME AND TOTAL HARMONIC DISTORTION VS. GAIN
GAIN
1
2
10
100
RG
OPEN
2k
226
20
SMALL
CADJ SIGNAL
(pF) BANDWIDTH
2–8 16.1MHz
2–8 14.7MHz
2–8 4.5MHz
2–8 660kHz
SETTLING
TIME
TO 0.1%
200ns
200ns
370ns
2.5µs
THD + NOISE
BELOW INPUT
LEVEL
@ 10kHz
82dB
82dB
81dB
71dB
Figure 26. A High Speed In-Amp Circuit for Data Acquisition
REV. F
–11–

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