DataSheet.es    


PDF ADV7171 Data sheet ( Hoja de datos )

Número de pieza ADV7171
Descripción Digital PAL/NTSC Video Encoder
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



Hay una vista previa y un enlace de descarga de ADV7171 (archivo pdf) en la parte inferior de esta página.


Total 30 Páginas

No Preview Available ! ADV7171 Hoja de datos, Descripción, Manual

Digital PAL/NTSC Video Encoder with 10-Bit
SSAF™ and Advanced Power Management
ADV7170/ADV7171
FEATURES
ITU-R1 BT601/656 YCrCb to PAL/NTSC video encoder
High quality 10-bit video DACs
SSAF (super sub-alias filter)
Advanced power management features
CGMS (copy generation management system)
WSS (wide screen signalling)
Simultaneous Y, U, V, C output format
NTSC M, PAL M/N2, PAL B/D/G/H/I, PAL60
Single 27 MHz clock required (×2 oversampling)
80 dB video SNR
32-bit direct digital synthesizer for color subcarrier
Multistandard video output support
Composite (CVBS)
Components S-Video (Y/C), YUV, and RGB
EuroSCART output (RGB + CVBS/LUMA)
Component YUV + CHROMA
Video input data port supports
CCIR-656 4:2:2 8-bit parallel input format
4:2:2 16-bit parallel input format
Programmable simultaneous composite and S-Video or RGB
(SCART)/YUV video outputs
Programmable luma filters (low-pass [PAL/NTSC]) notch,
extended (SSAF, CIF, and QCIF)
Programmable chroma filters (low-pass [0.65 MHz, 1.0 MHz,
1.2 MHz and 2.0 MHz], CIF and QCIF)
Programmable VBI (vertical blanking interval)
Programmable subcarrier frequency and phase
TTXREQ
TTX
Programmable LUMA delay
Individual on/off control of each DAC
CCIR and square pixel operation
Integrated subcarrier locking to external video source
Color signal control/burst signal control
Interlaced/noninterlaced operation
Complete on-chip video timing generator
Programmable multimode master/slave operation
Macrovision® AntiTaping Rev. 7.1 (ADV7170 only)3
Closed captioning support
Teletext insertion port (PAL-WST)
On-board color bar generation
On-board voltage reference
2-wire serial MPU interface (I2C®-compatible and Fast I2C)
Single supply 5 V or 3.3 V operation
Small 44-lead MQFP/TQFP packages
Industrial temperature grade = −40°C to +85°C4
APPLICATIONS
High performance DVD playback systems, portable video
equipment including digital still cameras and laptop PCs,
video games, PC video/multimedia and digital
satellite/cable systems (set-top boxes/IRD)
1 ITU-R and CCIR are used interchangeably in this document (ITU-R has replaced
CCIR recommendations).
2 Throughout the document N is referenced to PAL- Combination -N.
3 Protected by U.S. Patents 4,631,603;, 4,577,216, 4,819,098; and other intellectual
property rights. The Macrovision anticopy process is licensed for noncommercial
home use only, which is its sole intended use in the device. Please contact sales
office for latest Macrovision version available.
4 Refer to Table 8 for complete operating details.
VAA
RESET
COLOR
DATA
P7–P0
P15–P8
HSYNC
FIELD/VSYNC
BLANK
POWER
MANAGEMENT
CONTROL
(SLEEP MODE)
CGMS AND WSS
INSERTION
BLOCK
TELETEXT
INSERTION
BLOCK
YUV TO
RGB
MATRIX
8
4:2:2 TO
4:4:4 8
INTER-
POLATOR 8
Y8
YCrCb
TO
YUV
U8
MATRIX V 8
ADD 9
SYNC
8
ADD
BURST 8
INTER- 9
POLATOR
8
INTER-
POLATOR 8
PROGRAMMABLE
LUMINANCE
FILTER
10
PROGRAMMABLE
CHROMINANCE 10
FILTER
10
U
V
VIDEO TIMING
GENERATOR
I2C MPU PORT
REAL-TIME
CONTROL
CIRCUIT
10 10
SIN/COS
DDS BLOCK
M
10
U 10
L
T
10-BIT
DAC
10
I
P
10
10-BIT
10
L
E
DAC
X 10
E
R
10-BIT
DAC
10 10-BIT
DAC
ADV7170/ADV7171
VOLTAGE
REFERENCE
CIRCUIT
DAC D (PIN 27)
DAC C (PIN 26)
DAC B (PIN 31)
DAC A (PIN 32)
VREF
RSET
COMP
CLOCK
SCLOCK SDATA ALSB
SCRESET/RTC
Figure 1. Functional Block Diagram
Protected by U.S. Patents 5,343,196; 5,442,355; and other intellectual property rights.
GND
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.

1 page




ADV7171 pdf
ADV7170/ADV7171
VAA = 3.0 V to 3.6 V1, VREF = 1.235 V, RSET = 150 Ω. All specifications TMIN to TMAX2, unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE3
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
DIGITAL INPUTS3
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN3, 4
Input Capacitance, CIN
DIGITAL OUTPUTS3
Output High Voltage, VOH
Output Low Voltage, VOL
Three-State Leakage Current
Three-State Output Capacitance
ANALOG OUTPUTS3
Output Current4, 5
Output Current6
DAC-to-DAC Matching
Output Compliance, VOC
Output Impedance, ROUT
Output Capacitance, COUT
POWER REQUIREMENTS3, 7
VAA
Normal Power Mode
IDAC (max)8
IDAC (min)8
ICCT 9
Low Power Mode
IDAC (max)8
IDAC (min)8
ICCT9
Sleep Mode
IDAC 10
ICCT 11
Power Supply Rejection Ratio
Conditions1
RSET = 300 Ω
Guaranteed monotonic
VIN = 0.4 V or 2.4 V
ISOURCE = 400 μA
ISINK = 3.2 mA
RSET = 150 Ω, RL = 37.5 Ω
RSET = 1041 Ω, RL = 262.5 Ω
IOUT = 0 mA
RSET = 150 Ω, RL = 37.5 Ω
RSET = 1041 Ω, RL = 262.5 Ω
COMP = 0.1 μF
Min Typ
±0.6
2
10
2.4
10
33 34.7
5
2.0
0
30
3.0 3.3
150
20
35
80
20
35
0.1
0.001
0.01
Max Unit
10 Bits
LSB
±1 LSB
V
0.8 V
±1 μA
pF
V
0.4 V
10 μA
pF
37 mA
mA
%
1.4 V
30 pF
3.6 V
155 mA
mA
mA
mA
mA
mA
μA
μA
0.5 %/%
1 The min/max specifications are guaranteed over this range. The min/max values are typical over 3.0 V to 3.6 V.
2 Ambient temperature range TMIN to TMAX: −40°C to +85°C. The die temperature, TJ, must always be kept below 110°C.
3 Guaranteed by characterization.
4 Full drive into 37.5 Ω load.
5 DACs can output 35 mA typically at 3.3 V (RSET = 150 Ω and RL = 37.5 Ω); optimum performance obtained at 18 mA DAC current (RSET = 300 Ω and RL = 75 Ω).
6 Minimum drive current (used with buffered/scaled output load).
7 Power measurements are taken with clock frequency = 27 MHz. Max TJ = 110°C.
8 IDAC is the total current (min corresponds to 5 mA output per DAC, max corresponds to 38 mA output per DAC) to drive all four DACs. Turning off individual DACs
reduces IDAC correspondingly.
9 ICCT (circuit current) is the continuous current required to drive the device.
10 Total DAC current in sleep mode.
11 Total continuous current during sleep mode.
Rev. C | Page 5 of 64

5 Page





ADV7171 arduino
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADV7170/ADV7171
44 43 42 41 40 39 38 37 36 35 34
VAA 1
P5 2
P6 3
P7 4
P8 5
P9 6
P10 7
P11 8
P12 9
GND 10
VAA 11
PIN 1
ADV7170/ADV7171
MQFP/TQFP
TOP VIEW
(Not to Scale)
33 VREF
32 DAC A
31 DAC B
30 VAA
29 GND
28 VAA
27 DAC D
26 DAC C
25 COMP
24 SDATA
23 SCLOCK
12 13 14 15 16 17 18 19 20 21 22
Figure 5. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic
Input/
Output
1, 11, 20, 28, 30 VAA
P
2 to 9, 12 to 14,
38 to 42
P15 to P0
I
10, 19, 21, 29, 43 GND
G
15
HSYNC
I/O
16 FIELD/VSYNC I/O
17
BLANK
I/O
18
ALSB
I
22
RESET
I
23
SCLOCK
I
24
SDATA
I/O
25
COMP
O
26
DAC C
O
27
DAC D
O
31
DAC B
O
32
DAC A
O
33 VREF I/O
34 RSET I
Description
Power Supply (3 V to 5 V).
8-Bit 4:2:2 Multiplexed YCrCb Pixel Port (P7 to P0) or 16-Bit YCrCb Pixel Port (P15 to P0).
P0 represents the LSB.
Ground Pin.
HSYNC (Mode 1 and Mode 2) Control Signal. This pin may be configured to output (master
mode) or accept (slave mode) sync signals.
Dual Function FIELD (Mode 1) and VSYNC (Mode 2) Control Signal. This pin may be
configured to output (master mode) or accept (slave mode) these control signals.
Video Blanking Control Signal. The pixel inputs are ignored when this is Logic Level 0. This
signal is optional.
TTL Address Input. This signal sets up the LSB of the MPU address.
The input resets the on-chip timing generator and sets the ADV7170/ADV7171 into default
mode. This is NTSC operation, Timing Slave Mode 0, 8-bit operation, 2 × composite and
S-Video out, and DAC B powered on and DAC D powered off.
MPU Port Serial Interface Clock Input.
MPU Port Serial Data Input/Output.
Compensation Pin. Connect a 0.1 μF capacitor from COMP to VAA. For optimum dynamic
performance in low power mode, the value of the COMP capacitor can be lowered to as low
as 2.2 nF.
RED/S-Video C/V Analog Output.
GREEN/S-Video Y/Y Analog Output.
BLUE/Composite/U Analog Output.
PAL/NTSC Composite Video Output. Full-scale output is 180 IRE (1286 mV) for NTSC and
1300 mV for PAL.
Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
A 150 Ω resistor connected from this pin to GND is used to control full-scale amplitudes
of the video signals.
Rev. C | Page 11 of 64

11 Page







PáginasTotal 30 Páginas
PDF Descargar[ Datasheet ADV7171.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
ADV7170Digital PAL/NTSC Video EncoderAnalog Devices
Analog Devices
ADV7171Digital PAL/NTSC Video EncoderAnalog Devices
Analog Devices
ADV7172Digital PAL/NTSC Video EncoderAnalog Devices
Analog Devices
ADV7173Digital PAL/NTSC Video EncoderAnalog Devices
Analog Devices

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar