|
|
PDF AK4395 Data sheet ( Hoja de datos )
| Número de pieza | AK4395 | |
| Descripción | ADVANCED MULTI-BIT 192KHZ 24-BIT DAC | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AK4395 (archivo pdf) en la parte inferior de esta página. Total 26 Páginas | ||
|
No Preview Available !
ASAHI KASEI
[AK4395]
AK4395
Advanced Multi-Bit 192kHz 24-Bit ∆Σ DAC
GENERAL DESCRIPTION
The AK4395 is a high performance stereo DAC for the 192kHz sampling mode of DVD-Audio including a
24bit digital filter. The digital filter has high stopband attenuation with 110dB or more that reduces wide
band aliasing noise. The AK4395 introduces the advanced multi-bit system for ∆Σ modulator. This new
architecture achieves the wider dynamic range, while keeping much the same superior distortion
characteristics as conventional Single-Bit way. The analog outputs are filtered in the analog domain by
switched-capacitor filter (SCF) with high tolerance to clock jitter. The AK4395 also includes digital
volume, so the device is suitable for multi-channel audio system.
FEATURES
• 128x Oversampling
• Sampling Rate up to 192kHz
• High Performance 24Bit 8x Digital Filter (Slow Roll-off Option)
Ripple: ±0.0002dB, Attenuation: 110dB
• High Tolerance to Clock Jitter
• Low Distortion Differential Output
• Digital de-emphasis for 32, 44.1 & 48kHz sampling
• Channel Independent Digital Volume with Soft-transition
• Soft Mute
• THD+N: -100dB
• DR, S/N: 120dB
• I/F format:
MSB justified, 16/20/24bit LSB justified, I2S
• Master Clock:
Normal Speed: 256fs, 384fs, 512fs or 768fs
Double Speed: 128fs, 192fs, 256fs or 384fs
Quad Speed: 128fs or 192fs
• Power Supply: 5V±5%
• TTL Level Digital I/F
• Small Package: 28pin VSOP
• Pin Compatible with AK4393/4
DIF0 DIF1 DIF2 DVDD DVSS
DEM0 DEM1 AVDD AVSS
LRCK
BICK
SDATA
SMUTE
PDN
CAD0
CAD1
Audio Data
Interface
De-emphasis
Control
De-emphasis
DATT, Soft Mute
De-emphasis
DATT, Soft Mute
8x
Interpolator
∆Σ
Modulator
8x
Interpolator
∆Σ
Modulator
SCF
SCF
Control Register
Clock Divider
BVSS
VCOM
DZFL
AOUTL+
AOUTL-
AOUTR+
AOUTR-
DZFR
MS0040-E-01
CSN CCLK CDTI P/S
MCLK
-1-
VREFH VREFL
2001/4
1 page  
ASAHI KASEI
[AK4395]
ANALOG CHARACTERISTICS
(Ta = 25°C; AVDD, DVDD = 5V; AVSS, BVSS, DVSS = 0V, VREFH = AVDD, VREFL = AVSS;
fs = 44.1kHz; BICK = 64fs; Signal Frequency = 1kHz; 24bit Input Data; Measurement Bandwidth = 20Hz~20kHz;
RL ≥ 600Ω; External circuit: Figure 12; unless otherwise specified)
Parameter
min typ max Units
Resolution
24 Bits
Dynamic Characteristics (Note 5)
THD+N
fs=44.1kHz
0dBFS
-100 -90 dB
BW=20kHz -60dBFS
-53 - dB
fs=96kHz
0dBFS
-97 -87 dB
BW=40kHz -60dBFS
-51 - dB
fs=192kHz
0dBFS
-97 - dB
BW=40kHz -60dBFS
-51 - dB
Dynamic Range (-60dBFS with A-weighted) (Note 6)
112
117
dB
(Note 7)
-
120
dB
S/N (A-weighted)
(Note 8)
112
117
dB
(Note 7)
-
120
dB
Interchannel Isolation (1kHz)
100 120
dB
DC Accuracy
Interchannel Gain Mismatch
Gain Drift
Output Voltage
Load Resistance
0.15 0.3 dB
(Note 9)
20 - ppm/°C
(Note 10)
±2.25
±2.4
±2.55
Vpp
(Note 11)
600
Ω
Output Current
3.5 mA
Power Supplies
Power Supply Current
Normal Operation (PDN = “H”)
AVDD
60 - mA
DVDD(fs=44.1kHz)
7 - mA
DVDD(fs=96kHz)
10 - mA
DVDD(fs=192kHz)
17 - mA
AVDD + DVDD
110 mA
Power-Down Mode (PDN = “L”)
AVDD + DVDD
(Note 12)
10 100 µA
Power Supply Rejection
(Note 13)
50
dB
Notes: 5. At 44.1kHz, measured by Audio Precision, System Two. Averaging mode.
At 96kHz and 192kHz, measured by ROHDE & SCHWARZ, UPD. Averaging mode.
Refer to the evaluation board manual.
6. 101dB at 16bit data and 116dB at 20bit data.
7. By Figure13. External LPF Circuit Example 2.
8. S/N does not depend on input bit length.
9. The voltage on (VREFH-VREFL) is held +5V externally.
10. Full-scale voltage(0dB). Output voltage scales with the voltage of (VREFH-VREFL).
AOUT (typ.@0dB) = (AOUT+) - (AOUT-) = ±2.4Vpp×(VREFH-VREFL)/5.
11. For AC-load. 1kΩ for DC-load.
12. In the power-down mode. P/S = DVDD, and all other digital input pins including clock pins (MCLK, BICK and
LRCK) are held DVSS.
13. PSR is applied to AVDD, DVDD with 1kHz, 100mVpp. VREFH pin is held +5V.
MS0040-E-01
-5-
2001/4
5 Page 
ASAHI KASEI
[AK4395]
OPERATION OVERVIEW
System Clock
The external clocks, which are required to operate the AK4395, are MCLK, LRCK and BICK. The master clock (MCLK)
should be synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation
filter and the delta-sigma modulator. There are two methods to set MCLK frequency. In Manual Setting Mode (ACKS =
“0”: Register 00H), the sampling speed is set by DFS0/1(Table 1). CKS0/1/2 set the frequency of MCLK at each sampling
speed (Table 2). In Auto Setting Mode (ACKS = “1”: Default), as MCLK frequency is detected automatically (Table 6),
and the internal master clock becomes the appropriate frequency, it is not necessary to set DFS0/1 and CKS0/1/2. In
parallel mode, CKS2 and DFS1 are fixed to “0”.
All external clocks (MCLK, BICK and LRCK) should always be present whenever the AK4395 is in normal operation
mode (PD = “H”). If these clocks are not provided, the AK4395 may draw excess current because the device utilizes
dynamic refreshed logic internally. If the external clocks are not present, the AK4395 should be in the power-down mode
(PDN = “L”) or in the reset mode (RSTN = “0”). After exiting reset at power-up etc., the AK4395 is in power-down mode
until MCLK and LRCK are input.
DFS1
0
0
1
DFS0
0
1
0
Sampling Rate (fs)
Normal Speed Mode
30kHz~54kHz
Double Speed Mode
60kHz~108kHz
Quad Speed Mode
120kHz~216kHz
Default
Table 1. Sampling Speed (Manual Setting Mode)
Mode
0
1
2
3
4
5
6
7
CKS2
0
0
0
0
1
1
1
1
CKS1
0
0
1
1
0
0
1
1
CKS0
0
1
0
1
0
1
0
1
Normal
256fs
256fs
384fs
384fs
512fs
512fs
768fs
768fs
Double
128fs
256fs
192fs
384fs
256fs
N/A
384fs
N/A
Quad
N/A
N/A
N/A
N/A
128fs
N/A
192fs
N/A
Default
Table 2. System Clocks (Manual Setting Mode)
Note: The master clock at quad speed supports only 128fs or 192fs.
LRCK
fs
32.0kHz
44.1kHz
48.0kHz
256fs
8.1920MHz
11.2896MHz
12.2880MHz
MCLK
384fs
512fs
12.2880MHz 16.3840MHz
16.9344MHz 22.5792MHz
18.4320MHz 24.5760MHz
768fs
24.5760MHz
33.8688MHz
36.8640MHz
BICK
64fs
2.0480MHz
2.8224MHz
3.0720MHz
Table 3. System clock example (Normal Speed Mode @Manual Setting Mode)
MS0040-E-01
- 11 -
2001/4
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet AK4395.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AK4393 | ADVANCED MULTI-BIT 96KHZ 24-BIT DAC | Asahi Kasei Microsystems |
| AK4394 | ADVANCED MULTI-BIT 192KHZ 24-BIT DAC | Asahi Kasei Microsystems |
| AK4395 | ADVANCED MULTI-BIT 192KHZ 24-BIT DAC | Asahi Kasei Microsystems |
| AK4396 | Advanced Multi-Bit DAC |  AKM |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |